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[2603:6081:7b01:cbda:dc90:a0ce:b038:cf88]) by smtp.gmail.com with ESMTPSA id h4sm5784651qkp.54.2022.01.10.17.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Jan 2022 17:45:47 -0800 (PST) Date: Mon, 10 Jan 2022 20:45:45 -0500 From: Tom Rini To: Chris Packham Cc: Stefan Roese , u-boot , Chris Packham , Marek =?iso-8859-1?Q?Beh=FAn?= Subject: Re: [PATCH 2/2] ARM: mvebu: x530: Add option for ECC Message-ID: <20220111014545.GD2773246@bill-the-cat> References: <20220106030857.1410516-1-judge.packham@gmail.com> <20220106030857.1410516-2-judge.packham@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="4GcIcMHwAI2vZdf2" Content-Disposition: inline In-Reply-To: X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean --4GcIcMHwAI2vZdf2 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jan 11, 2022 at 02:37:53PM +1300, Chris Packham wrote: > On Mon, Jan 10, 2022 at 9:10 PM Chris Packham w= rote: > > > > > > > > On Mon, 10 Jan 2022, 8:37 PM Stefan Roese, wrote: > >> > >> On 1/6/22 04:08, Chris Packham wrote: > >> > Some older x530 boards have layout issues that cause problems for DD= R. > >> > These are usually seen as training failures but can also cause probl= ems > >> > after training has completed. Add an option to enable ECC leaving the > >> > default as N which will work with both old and new boards. > >> > > >> > Signed-off-by: Chris Packham > >> > >> Just checking: Most likely you don't have the possibility to detect the > >> board version at runtime? > > > > > > Not in a way that can be done without working RAM. For our internal for= k we maintain 2 defconfigs one with ECC one without. We can manage via the = BOM which boards get which bootloader. > > > >> > >> If this is not possible: > >> > >> Reviewed-by: Stefan Roese > >> > >> Thanks, > >> Stefan > >> > >> > --- > >> > > >> > arch/arm/mach-mvebu/Kconfig | 1 + > >> > board/alliedtelesis/x530/Kconfig | 20 ++++++++++++++++++++ > >> > board/alliedtelesis/x530/x530.c | 8 +++++++- > >> > 3 files changed, 28 insertions(+), 1 deletion(-) > >> > create mode 100644 board/alliedtelesis/x530/Kconfig > >> > > >> > diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconf= ig > >> > index d23cc0c760f1..7388ade98d52 100644 > >> > --- a/arch/arm/mach-mvebu/Kconfig > >> > +++ b/arch/arm/mach-mvebu/Kconfig > >> > @@ -341,5 +341,6 @@ config SECURED_MODE_CSK_INDEX > >> > > >> > source "board/solidrun/clearfog/Kconfig" > >> > source "board/kobol/helios4/Kconfig" > >> > +source "board/alliedtelesis/x530/Kconfig" > >> > > >> > endif > >> > diff --git a/board/alliedtelesis/x530/Kconfig b/board/alliedtelesis/= x530/Kconfig > >> > new file mode 100644 > >> > index 000000000000..5c1ae36aebaa > >> > --- /dev/null > >> > +++ b/board/alliedtelesis/x530/Kconfig > >> > @@ -0,0 +1,20 @@ > >> > +menu "x530 configuration" > >> > + depends on TARGET_X530 > >> > + > >> > +config X530_ECC > >> > + bool "Enable DDR3 ECC" > >> > + help > >> > + Some of the older x530 board have layout issues which cause = problems > >> > + for the DDR which usually exhibit as DDR training failures or > >> > + problems accessing DDR after training. > >> > + > >> > + The known affected boards are: > >> > + > >> > + * 844-001897-00 (x530-28GTXm, x530-28GPXm, GS980MX/28PSm) > >> > + * 844-001948-00 (GS980MX/28) > >> > + * 844-002008-00 (x530L-52GTX, x530L-52GPX) > >> > + * 844-001974-00 (x530-52GTXm, x530-52GPXm, GS980MX/52PSm) > >> > + > >> > + If you have a newer board you can set Y here, otherwise say = N. > >> > + > >> > +endmenu > >> > diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x= 530/x530.c > >> > index 866b6e68cc16..de20684f4353 100644 > >> > --- a/board/alliedtelesis/x530/x530.c > >> > +++ b/board/alliedtelesis/x530/x530.c > >> > @@ -45,6 +45,12 @@ int hws_board_topology_load(struct serdes_map **s= erdes_map_array, u8 *count) > >> > return 0; > >> > } > >> > > >> > +#if CONFIG_IS_ENABLED(X530_ECC) > >> > + #define BUS_MASK BUS_MASK_32BIT_ECC > >> > +#else > >> > + #define BUS_MASK BUS_MASK_32BIT > >> > +#endif > >> > + >=20 > Hmm this doesn't actually appear to be working as intended. When the > SPL is built I end up with CONFIG_IS_ENABLED(X530_ECC) =3D=3D 0 even when > I set it to y. Do I need to define a SPL version of this Kconfig > symbol? If you're using CONFIG_IS_ENABLED, then yes. It doesn't always make sense to use CONFIG_IS_ENABLED or other macros rather than just #ifdef checks. --=20 Tom --4GcIcMHwAI2vZdf2 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmHc4UYACgkQFHw5/5Y0 tyyG/wwAn3Fi2zxEjK5++h+gyWQnNdcewvYga6mv0s9TNl0sJI0fTz+c4oIBBgY6 JTwLfKCMe+X2vv6Rd3PaxYbcuXj+JLn/p1uyD1nfRT1UZiIXuJsWGUT52AM2eEx5 jPyrml3IU32cGbvKHxE7x15etbJN8T+v1Jz90JqKUBlYNmqzQmVEBQIo0sR7udpd jcNuBNowExsFW53VOWuRBX2NjnjiXlCaAMvV9V5iDfM5FjRIKytIG/+Suz1W2vdZ fJg/WHIFKAn7EOtJjPgEu4HdjQ0nxQU46ZfBFqoMuA4AIiPNdnseRarx2sL53GUo ubaN7EDTPganEwUdQjc2xG9jtoG68lllzI5caaUD1R86RkHd2JSwRr1dLkSYFMRK SMvomAC5rqLF+MvUGJxrnoCI6EqqSqqa1JQc17pKC+mvZlqDsAJ4YTKoepXg5088 zMeQMm21/v4RtKZUO9SPh9l4wcPD7yP2xmnzItyKgcz0QoL8t3uRSVNygZdlkvwh N9Aje85/ =o3UT -----END PGP SIGNATURE----- --4GcIcMHwAI2vZdf2--