Re: [PATCH v2 4/4] rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568

[赵仪峰 <yifeng.zhao@rock-chips.com>]

Hi Alper，

The Synopsys DWC MSHC for RK3568 and RK3588 need config
DWCMSHC_EMMC_CONTROL.bit0 = 1 （CARD_IS_EMMC）
to enable Data Strobe pin for HS400 and HS400ES.

reference code:
#define DWCMSHC_EMMC_CONTROL 0x52c
#define DWCMSHC_CARD_IS_EMMC BIT(0)

/* set CARD_IS_EMMC bit to enable Data Strobe for HS400 and HS400ES */
ctrl = sdhci_readw(host, DWCMSHC_EMMC_CONTROL);
ctrl |= DWCMSHC_CARD_IS_EMMC;
sdhci_writew(host, ctrl, DWCMSHC_EMMC_CONTROL);

>
On RK3568, a register bit must be set to enable Enhanced Strobe.
However, it appears that the address of this register may differ from
vendor to vendor and should be read from the underlying MMC IP.
Let the Rockchip SDHCI driver read this address and set the relevant bit
when Enhanced Strobe configuration is requested.
 
This is mostly ported from Linux's Synopsys DWC MSHC driver which
happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in
Linux tree).
 
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
Didn't add Reviewed-by tag due to changes. Only build-tested as I don't
have a RK3568 board.
 
Changes in v2:
- Rename rk3568_set_enhanced_strobe -> rk3568_sdhci_set_enhanced_strobe
- Let set_enhanced_strobe() unset the ES bit if mode is not HS400_ES
 
drivers/mmc/rockchip_sdhci.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
 
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f920c5141142..3030d746f890 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -45,6 +45,13 @@
#define ARASAN_VENDOR_REGISTER 0x78
#define ARASAN_VENDOR_ENHANCED_STROBE BIT(0)
+/* DWC IP vendor area 1 pointer */
+#define DWCMSHC_P_VENDOR_AREA1 0xe8
+#define DWCMSHC_AREA1_MASK GENMASK(11, 0)
+/* Offset inside the vendor area 1 */
+#define DWCMSHC_EMMC_CONTROL 0x2c
+#define DWCMSHC_ENHANCED_STROBE BIT(8)
+
/* Rockchip specific Registers */
#define DWCMSHC_EMMC_DLL_CTRL 0x800
#define DWCMSHC_EMMC_DLL_CTRL_RESET BIT(1)
@@ -311,6 +318,25 @@ static int rk3568_emmc_get_phy(struct udevice *dev)
return 0;
}
+static int rk3568_sdhci_set_enhanced_strobe(struct sdhci_host *host)
+{
+ struct mmc *mmc = host->mmc;
+ u32 vendor;
+ int reg;
+
+ reg = (sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK)
+       + DWCMSHC_EMMC_CONTROL;
+
+ vendor = sdhci_readl(host, reg);
+ if (mmc->selected_mode == MMC_HS_400_ES)
+ vendor |= DWCMSHC_ENHANCED_STROBE;
+ else
+ vendor &= ~DWCMSHC_ENHANCED_STROBE;
+ sdhci_writel(host, vendor, reg);
+
+ return 0;
+}
+
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
@@ -519,6 +545,7 @@ static const struct sdhci_data rk3568_data = {
.get_phy = rk3568_emmc_get_phy,
.emmc_phy_init = rk3568_emmc_phy_init,
.set_ios_post = rk3568_sdhci_set_ios_post,
+ .set_enhanced_strobe = rk3568_sdhci_set_enhanced_strobe,
};
static const struct udevice_id sdhci_ids[] = {
-- 
2.34.1