Re: [PATCH u-boot-marvell 00/16] tools: kwbimage: Load address fixes

Stefan Roese
2022-01-12T11:06:33Z

Hi Pali,

On 1/12/22 11:55, Stefan Roese wrote:
> On 1/12/22 11:41, Pali Rohár wrote:
>> On Wednesday 12 January 2022 08:26:10 Stefan Roese wrote:
>>> Hi Pali,
>>>
>>> while testing with this patchset (amongst others), I get this error
>>> while building for "theadorable_debug":
>>>
>>> $ make theadorable_debug_defconfig
>>> $ make -s -j20
>>> Invalid LOAD_ADDRESS 0x40004030 for BINARY spl/u-boot-spl.bin with 0
>>> args.
>>> Address must be 4-byte aligned and in range 0x40000028-0x40000424
>>> .make: *** [Makefile:1448: u-boot-spl.kwb] Error 1
>>> make: *** Deleting file 'u-boot-spl.kwb'
>>>
>>> Could you please take a look on whats going wrong here? Do I need to
>>> change CONFIG_SPL_TEXT_BASE now? And if yes, why?
>>
>> Hello!
>>
>> If everything is working fine without this patch series then address
>> must not be changed.
>
> Yes, everything works just fine without out this series.
>
>> Now I realized that some boards have text base address 0x40004030 and
>> some have 0x40000030. When I was looking it during writing this patch
>> series, I have not spotted that there is different digit "4" in the
>> middle... And therefore I was in impression that every 32-bit Armada has
>> base address 0x40000000 (increased by magic constant 0x30 which is
>> explained in one of the patches).
>
> I see.
>
>> So now I need to figure out, why some boards have base address
>> 0x40004000 and some have 0x40000000. It it somewhere documented this
>> magic address? Or do you know source of this address for your board?
>
> This is so loooong ago that I worked on this. I can only guess, that the
> are up to offset 0x4000 was reserved by/for the BootROM.

This info is still in some of the config headers:

/*
* Memory layout while starting into the bin_hdr via the
* BootROM:
*
* 0x4000.4000 - 0x4003.4000 headers space (192KiB)
* 0x4000.4030 bin_hdr start address
* 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
* 0x4007.fffc BootROM stack top
*
* The address space between 0x4007.fffc and 0x400f.fff is not locked in
* L2 cache thus cannot be used.
*/

HTP.

Thanks,
Stefan