From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 700B1C433EF for ; Mon, 24 Jan 2022 17:02:41 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6E5FD80F3F; Mon, 24 Jan 2022 18:02:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 2914080820; Mon, 24 Jan 2022 18:02:38 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 33A6280F3F for ; Mon, 24 Jan 2022 18:02:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3D59FD6E; Mon, 24 Jan 2022 09:02:34 -0800 (PST) Received: from donnerap.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A85553F73B; Mon, 24 Jan 2022 09:02:32 -0800 (PST) Date: Mon, 24 Jan 2022 17:02:30 +0000 From: Andre Przywara To: Jagan Teki Cc: Simon Glass , Tom Rini , Chen-Yu Tsai , Hauke Mehrtens , Jernej Skrabec , Samuel Holland , Icenowy Zheng , Joe Hershberger , Wolfgang Denk , Daniel Wagenknecht , u-boot@lists.denx.de Subject: Re: [PATCH 2/7] sunxi: Kconfig: Fix up SPI configuration Message-ID: <20220124170230.6c2276b9@donnerap.cambridge.arm.com> In-Reply-To: <20220111124607.863952-3-andre.przywara@arm.com> References: <20220111124607.863952-1-andre.przywara@arm.com> <20220111124607.863952-3-andre.przywara@arm.com> Organization: ARM X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Tue, 11 Jan 2022 12:46:02 +0000 Andre Przywara wrote: Hi Jagan, can you please have a look at this patch? It seems like a nice cleanup to me, but I would like to hear your opinion. Cheers, Andre > Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64") > selected CONFIG_SPI by default on all Allwinner A64 boards, even though > only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs > had to manually select DM_SPI and friends, even though they are a > platform property (the sunxi SPI driver is DM_SPI only). > > Clean this up to allow easy selection of SPI flash support in U-Boot > proper, by selecting DM_SPI and DM_SPI_FLASH *if* CONFIG_SPI is > selected, for *all* Allwinner SoCs. This simplifies the defconfig for > two Libretech boards already. > > Also remove the forced CONFIG_SPI from the A64 Kconfig, instead let the > four boards which allow SPI booting select this explicitly. > > Any board wishing to support SPI flash in U-Boot proper now just defines > CONFIG_SPI and CONFIG_SPI_FLASH_ in its defconfig, Kconfig takes > care of the rest. > > Signed-off-by: Andre Przywara > --- > arch/arm/Kconfig | 2 ++ > arch/arm/mach-sunxi/Kconfig | 3 --- > configs/libretech_all_h3_it_h5_defconfig | 2 -- > configs/libretech_all_h5_cc_h5_defconfig | 2 -- > configs/oceanic_5205_5inmfd_defconfig | 1 + > configs/orangepi_win_defconfig | 1 + > configs/pine64-lts_defconfig | 1 + > configs/sopine_baseboard_defconfig | 1 + > 8 files changed, 6 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 7264d72bde..0f63bfdded 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1055,6 +1055,8 @@ config ARCH_SUNXI > select DM_ETH > select DM_GPIO > select DM_I2C if I2C > + select DM_SPI if SPI > + select DM_SPI_FLASH if SPI > select DM_KEYBOARD > select DM_MMC if MMC > select DM_SCSI if SCSI > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig > index 2c18cf02d1..56ff1e197c 100644 > --- a/arch/arm/mach-sunxi/Kconfig > +++ b/arch/arm/mach-sunxi/Kconfig > @@ -324,9 +324,6 @@ config MACH_SUN9I > config MACH_SUN50I > bool "sun50i (Allwinner A64)" > select ARM64 > - select SPI > - select DM_SPI if SPI > - select DM_SPI_FLASH > select PHY_SUN4I_USB > select SUN6I_PRCM > select SUNXI_DE2 > diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig > index 7f0e0be50b..cb7ffb4d7d 100644 > --- a/configs/libretech_all_h3_it_h5_defconfig > +++ b/configs/libretech_all_h3_it_h5_defconfig > @@ -7,9 +7,7 @@ CONFIG_DRAM_CLK=672 > CONFIG_MMC_SUNXI_SLOT_EXTRA=2 > CONFIG_SPL_SPI_SUNXI=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > -CONFIG_DM_SPI_FLASH=y > CONFIG_SPI_FLASH_XMC=y > CONFIG_SPI=y > -CONFIG_DM_SPI=y > CONFIG_USB_EHCI_HCD=y > CONFIG_USB_OHCI_HCD=y > diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig > index 25bfe52b32..c3aa4b1061 100644 > --- a/configs/libretech_all_h5_cc_h5_defconfig > +++ b/configs/libretech_all_h5_cc_h5_defconfig > @@ -7,10 +7,8 @@ CONFIG_DRAM_CLK=672 > CONFIG_MMC_SUNXI_SLOT_EXTRA=2 > CONFIG_SPL_SPI_SUNXI=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > -CONFIG_DM_SPI_FLASH=y > CONFIG_SPI_FLASH_XMC=y > CONFIG_SUN8I_EMAC=y > CONFIG_SPI=y > -CONFIG_DM_SPI=y > CONFIG_USB_EHCI_HCD=y > CONFIG_USB_OHCI_HCD=y > diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig > index 9ba115c97d..7ce63ba665 100644 > --- a/configs/oceanic_5205_5inmfd_defconfig > +++ b/configs/oceanic_5205_5inmfd_defconfig > @@ -11,5 +11,6 @@ CONFIG_MMC0_CD_PIN="" > CONFIG_SPL_SPI_SUNXI=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > CONFIG_SUN8I_EMAC=y > +CONFIG_SPI=y > CONFIG_USB_EHCI_HCD=y > CONFIG_USB_OHCI_HCD=y > diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig > index 8c2179ba8b..133755291a 100644 > --- a/configs/orangepi_win_defconfig > +++ b/configs/orangepi_win_defconfig > @@ -9,5 +9,6 @@ CONFIG_SPL_SPI_SUNXI=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > CONFIG_PHY_REALTEK=y > CONFIG_SUN8I_EMAC=y > +CONFIG_SPI=y > CONFIG_USB_EHCI_HCD=y > CONFIG_USB_OHCI_HCD=y > diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig > index 6209e68e2d..75a77acc44 100644 > --- a/configs/pine64-lts_defconfig > +++ b/configs/pine64-lts_defconfig > @@ -11,5 +11,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 > CONFIG_SPL_SPI_SUNXI=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > CONFIG_SUN8I_EMAC=y > +CONFIG_SPI=y > CONFIG_USB_EHCI_HCD=y > CONFIG_USB_OHCI_HCD=y > diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig > index 0093076dc5..982f7b0b67 100644 > --- a/configs/sopine_baseboard_defconfig > +++ b/configs/sopine_baseboard_defconfig > @@ -13,5 +13,6 @@ CONFIG_SPL_SPI_SUNXI=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > CONFIG_SPI_FLASH_WINBOND=y > CONFIG_SUN8I_EMAC=y > +CONFIG_SPI=y > CONFIG_USB_EHCI_HCD=y > CONFIG_USB_OHCI_HCD=y