From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0815EC433F5 for ; Sat, 29 Jan 2022 15:23:57 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B807A8380F; Sat, 29 Jan 2022 16:23:28 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XLUUB+vr"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DB1BE836BE; Sat, 29 Jan 2022 16:23:21 +0100 (CET) Received: from mail-qk1-x72d.google.com (mail-qk1-x72d.google.com [IPv6:2607:f8b0:4864:20::72d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A687E83260 for ; Sat, 29 Jan 2022 16:23:18 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mr.bossman075@gmail.com Received: by mail-qk1-x72d.google.com with SMTP id b22so8139923qkk.12 for ; Sat, 29 Jan 2022 07:23:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fw7JVODPZy40sywDWXwUVIygwojoGEFVJEyYtcAV2KE=; b=XLUUB+vru1I77uaI6QP7UPdBQmHXW5Ap4C2GIDmTh54IcVL+T+yUDY1YMbCIS5v8P3 tGmG7WWUq4nY8FTISxcOds608l+FP/OC19SQjocFBitQ47GmOSgpkJP1kbqDt+711U0j B5/oXLHmoH20eCILrD/d6MuH8/z/Vzq3Ov0n/wfp4WmPlB4nGteoNtPQ2yfRG6gBY8zH 0pyyJ5VKPpzTBR7JCxhfR+R1qln8hv3u9Xu4wkBoem9ed6SOoAVdzM5/j8Ooahh067ud b92Jom8ywLMGeYHPnjhthCxjDEzAelYpeVUhQLR708wMwBB9hz7zaDvoFEitVvz5r8by eY7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fw7JVODPZy40sywDWXwUVIygwojoGEFVJEyYtcAV2KE=; b=xMzl91ynfgdWZOrrNMJSmxGuw1f852D8R/PyHJevJIbDHJ3kw0x59VjezqGI7beXn0 Di9kbkAGQaxznP0Hj7NJy4RhckvklGq/nRX3SFKHWwbLJafSyxMYn2oy476Vvw3Ele/S RusIDZBM82zpvv6NzBCFAZyZicVtzzy8L5/SwYbUjL+3Re8N/aK7tbozr6m52jvFvQBV RV/CoYoJ010kTSzHVUhgmxqTYtUduAvMtfVfxPePNtolFcnbIzUhpd9C+XiRwvAPNosX 8vAhGqWjuV+PeUEvzbL7v7n4ZG10uh1swZFYIfCgEWvrJVWlqQToDilYJvzeSb0kjCr6 +8nw== X-Gm-Message-State: AOAM530PUzWJvxh0r6DnsBdpNLphEmsjLHA7Vr4ML4aQ5f7ff8qal0v2 5D1RsvzUqiI8WoxPjx9v+A5328YYzKU= X-Google-Smtp-Source: ABdhPJyZ3ivtXALd98exB8eaxnFEA8zdJqo3JfTY+Th67+LaEoNiqXjSSCyrMo169k2VDPSMJxnKrg== X-Received: by 2002:a05:620a:45ac:: with SMTP id bp44mr8492822qkb.451.1643469797322; Sat, 29 Jan 2022 07:23:17 -0800 (PST) Received: from jesse-desktop.jtp-bos.lab (146-115-144-188.s4282.c3-0.nwt-cbr1.sbo-nwt.ma.cable.rcncustomer.com. [146.115.144.188]) by smtp.gmail.com with ESMTPSA id c127sm5063124qkf.36.2022.01.29.07.23.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Jan 2022 07:23:16 -0800 (PST) From: Jesse Taube X-Google-Original-From: Jesse Taube To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, andre.przywara@arm.com, hdegoede@redhat.com, sjg@chromium.org, icenowy@aosc.io, marek.behun@nic.cz, festevam@denx.de, narmstrong@baylibre.com, tharvey@gateworks.com, christianshewitt@gmail.com, pbrobinson@gmail.com, jernej.skrabec@gmail.com, hs@denx.de, samuel@sholland.org, arnaud.ferraris@gmail.com, giulio.benetti@benettiengineering.com, Mr.Bossman075@gmail.com, thirtythreeforty@gmail.com Subject: [PATCH v3 04/10] ARM: sunxi: Add clock and uart to sunxi headers Date: Sat, 29 Jan 2022 10:23:03 -0500 Message-Id: <20220129152309.1567937-5-Mr.Bossman075@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220129152309.1567937-1-Mr.Bossman075@gmail.com> References: <20220129152309.1567937-1-Mr.Bossman075@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Icenowy Zheng This patch aims to add header files for the suniv. The header files included add support for uart, and clocks. Signed-off-by: Icenowy Zheng Reviewed-by: Andre Przywara Signed-off-by: Jesse Taube --- V1->V2: * Change commit description and topic * Change PLL6_CFG_DEFAULT * Combine APB1_GATE ifdefs * Combine SUNXI_UART0_BASE ifdefs * Fix negative logic * Remove unused macros V2->V3: * Nothing done --- arch/arm/include/asm/arch-sunxi/clock.h | 2 +- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 13 +++++++++++++ arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 6 ++++++ arch/arm/include/asm/arch-sunxi/gpio.h | 1 + 4 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h index cbbe5c7a1e..2cfd540742 100644 --- a/arch/arm/include/asm/arch-sunxi/clock.h +++ b/arch/arm/include/asm/arch-sunxi/clock.h @@ -19,7 +19,7 @@ #elif defined(CONFIG_SUN50I_GEN_H6) #include #elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \ - defined(CONFIG_MACH_SUN50I) + defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUNIV) #include #elif defined(CONFIG_MACH_SUN9I) #include diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index ee387127f3..7fcf340db6 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -226,7 +226,12 @@ struct sunxi_ccm_reg { #define CCM_PLL5_CTRL_SIGMA_DELTA_EN (0x1 << 24) #define CCM_PLL5_CTRL_EN (0x1 << 31) +#ifdef CONFIG_MACH_SUNIV +/* suniv pll6 doesn't have postdiv 2, so k is set to 0 */ +#define PLL6_CFG_DEFAULT 0x90041801 +#else #define PLL6_CFG_DEFAULT 0x90041811 /* 600 MHz */ +#endif #define CCM_PLL6_CTRL_N_SHIFT 8 #define CCM_PLL6_CTRL_N_MASK (0x1f << CCM_PLL6_CTRL_N_SHIFT) @@ -488,6 +493,14 @@ struct sunxi_ccm_reg { #define AHB_RESET_OFFSET_EPHY 2 #define AHB_RESET_OFFSET_LVDS 0 +/* apb1 reset */ +#ifdef CONFIG_MACH_SUNIV +#define APB1_GATE_UART_SHIFT (20) +#define APB1_GATE_TWI_SHIFT (16) +#define APB1_RESET_UART_SHIFT (20) +#define APB1_RESET_TWI_SHIFT (16) +#endif + /* apb2 reset */ #define APB2_RESET_UART_SHIFT (16) #define APB2_RESET_UART_MASK (0xff << APB2_RESET_UART_SHIFT) diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index d4c795d89c..b7b4564af3 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -129,9 +129,15 @@ defined(CONFIG_MACH_SUN50I) #define SUNXI_CPUCFG_BASE 0x01c25c00 #endif +#ifndef CONFIG_MACH_SUNIV #define SUNXI_UART0_BASE 0x01c28000 #define SUNXI_UART1_BASE 0x01c28400 #define SUNXI_UART2_BASE 0x01c28800 +#else +#define SUNXI_UART0_BASE 0x01c25000 +#define SUNXI_UART1_BASE 0x01c25400 +#define SUNXI_UART2_BASE 0x01c25800 +#endif #define SUNXI_UART3_BASE 0x01c28c00 #define SUNXI_UART4_BASE 0x01c29000 #define SUNXI_UART5_BASE 0x01c29400 diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index f3ab1aea0e..ced69f7dd4 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -165,6 +165,7 @@ enum sunxi_gpio_number { #define SUNXI_GPD_LVDS0 3 #define SUNXI_GPD_PWM 2 +#define SUNIV_GPE_UART0 5 #define SUN8I_GPE_TWI2 3 #define SUN50I_GPE_TWI2 3 -- 2.34.1