From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65B36C433F5 for ; Sat, 29 Jan 2022 23:01:12 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7DB2383677; Sun, 30 Jan 2022 00:01:10 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 5B3A383699; Sun, 30 Jan 2022 00:01:09 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 0C9E483510 for ; Sun, 30 Jan 2022 00:01:06 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 80E60ED1; Sat, 29 Jan 2022 15:01:05 -0800 (PST) Received: from slackpad.fritz.box (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C9D263F73B; Sat, 29 Jan 2022 15:01:02 -0800 (PST) Date: Sat, 29 Jan 2022 23:00:52 +0000 From: Andre Przywara To: Jesse Taube Cc: u-boot@lists.denx.de, jagan@amarulasolutions.com, hdegoede@redhat.com, sjg@chromium.org, icenowy@aosc.io, marek.behun@nic.cz, festevam@denx.de, narmstrong@baylibre.com, tharvey@gateworks.com, christianshewitt@gmail.com, pbrobinson@gmail.com, jernej.skrabec@gmail.com, hs@denx.de, samuel@sholland.org, arnaud.ferraris@gmail.com, giulio.benetti@benettiengineering.com, thirtythreeforty@gmail.com Subject: Re: [PATCH v3 10/10] configs: sunxi: Add support for Lichee Pi Nano Message-ID: <20220129230052.69c8a178@slackpad.fritz.box> In-Reply-To: <20220129152309.1567937-11-Mr.Bossman075@gmail.com> References: <20220129152309.1567937-1-Mr.Bossman075@gmail.com> <20220129152309.1567937-11-Mr.Bossman075@gmail.com> Organization: Arm Ltd. X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Sat, 29 Jan 2022 10:23:09 -0500 Jesse Taube wrote: > From: Icenowy Zheng > > The Lichee Pi Nano is a board based on the F1C100s. > Add defconfigs for it. Looks very nice now, many thanks! > > Signed-off-by: Icenowy Zheng > Signed-off-by: Jesse Taube Reviewed-by: Andre Przywara Cheers, Andre > --- > V1->V2: > * Add SKIP_LOWLEVEL_INIT_ONLY > * Remove spi defconfig > V2->V3: > * Move SYS_MALLOC_F_LEN to kconf and format it > * Move SYS_LOAD_ADDR to kconf and format it > * Move SYS_TEXT_BASE to kconf and format it > > --- > Kconfig | 8 +++++--- > boot/Kconfig | 7 ++++--- > configs/licheepi_nano_defconfig | 11 +++++++++++ > 3 files changed, 20 insertions(+), 6 deletions(-) > create mode 100644 configs/licheepi_nano_defconfig > > diff --git a/Kconfig b/Kconfig > index c46f4fce86..ef4e350ea8 100644 > --- a/Kconfig > +++ b/Kconfig > @@ -246,9 +246,10 @@ config SYS_MALLOC_F_LEN > config SYS_MALLOC_LEN > hex "Define memory for Dynamic allocation" > default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON > - default 0x4020000 if ARCH_SUNXI && !MACH_SUN8I_V3S > default 0x200000 if ARCH_BMIPS || X86 > - default 0x220000 if ARCH_SUNXI && MACH_SUN8I_V3S > + default 0x120000 if MACH_SUNIV > + default 0x220000 if MACH_SUN8I_V3S > + default 0x4020000 if ARCH_SUNXI > default 0x400000 > help > This defines memory to be allocated for Dynamic allocation > @@ -391,8 +392,9 @@ config SYS_LOAD_ADDR > hex "Address in memory to use by default" > default 0x01000000 if ARCH_SOCFPGA > default 0x02000000 if PPC || X86 > + default 0x81000000 if MACH_SUNIV > default 0x22000000 if MACH_SUN9I > - default 0x42000000 if ARCH_SUNXI && !MACH_SUN9I > + default 0x42000000 if ARCH_SUNXI > default 0x82000000 if ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 > default 0x82000000 if ARCH_MX6 && (MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL) > default 0x12000000 if ARCH_MX6 && !(MX6SL || MX6SLL || MX6SX || MX6UL || MX6ULL) > diff --git a/boot/Kconfig b/boot/Kconfig > index f1ce576ab2..d16acfe563 100644 > --- a/boot/Kconfig > +++ b/boot/Kconfig > @@ -351,9 +351,10 @@ config SYS_TEXT_BASE > depends on HAVE_SYS_TEXT_BASE > default 0x0 if POSITION_INDEPENDENT > default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3 > - default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S > - default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I > - default 0x42e00000 if ARCH_SUNXI && MACH_SUN8I_V3S > + default 0x81700000 if MACH_SUNIV > + default 0x2a000000 if MACH_SUN9I > + default 0x42e00000 if MACH_SUN8I_V3S > + default 0x4a000000 if ARCH_SUNXI > hex "Text Base" > help > The address in memory that U-Boot will be running from, initially. > diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig > new file mode 100644 > index 0000000000..ecec869d18 > --- /dev/null > +++ b/configs/licheepi_nano_defconfig > @@ -0,0 +1,11 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_SUNXI=y > +CONFIG_MACH_SUNIV=y > +CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y > +CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y > +CONFIG_DRAM_CLK=156 > +CONFIG_SYS_DCACHE_OFF=y > +CONFIG_DRAM_ZQ=0 > +# CONFIG_VIDEO_SUNXI is not set > +CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano" > +CONFIG_SPL=y