From: Johan Jonker <jbx6244@gmail.com>
To: kever.yang@rock-chips.com
Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de,
w.egorov@phytec.de, hl@rock-chips.com,
jagan@amarulasolutions.com, heiko@sntech.de
Subject: [PATCH v1 04/15] arm: dts: rockchip: sync rk3229-evb.dts from Linux
Date: Mon, 7 Feb 2022 04:47:16 +0100 [thread overview]
Message-ID: <20220207034727.2683-4-jbx6244@gmail.com> (raw)
In-Reply-To: <20220207034727.2683-1-jbx6244@gmail.com>
Sync rk3229-evb.dts from Linux version 5.17 and add
a rk3229-evb-u-boot.dtsi file for U-boot specific stuff.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3229-evb-u-boot.dtsi | 28 ++++
arch/arm/dts/rk3229-evb.dts | 223 ++++++++++++++++++++++++----
arch/arm/dts/rk3229.dtsi | 52 +++++++
3 files changed, 274 insertions(+), 29 deletions(-)
create mode 100644 arch/arm/dts/rk3229-evb-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3229.dtsi
diff --git a/arch/arm/dts/rk3229-evb-u-boot.dtsi b/arch/arm/dts/rk3229-evb-u-boot.dtsi
new file mode 100644
index 00000000..b65149c2
--- /dev/null
+++ b/arch/arm/dts/rk3229-evb-u-boot.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk322x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ };
+};
+
+&dmc {
+ rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
+ 0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
+ 0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1
+ 0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4
+ 0x0 0x924>;
+ rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
+ rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
+ 0 300 3 0 120>;
+};
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 632cdc9b..797476e8 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -1,18 +1,16 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
-#include "rk322x.dtsi"
+#include <dt-bindings/input/input.h>
+#include "rk3229.dtsi"
/ {
model = "Rockchip RK3229 Evaluation board";
compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
- chosen {
- stdout-path = &uart2;
+ aliases {
+ mmc0 = &emmc;
};
memory@60000000 {
@@ -20,6 +18,15 @@
reg = <0x60000000 0x40000000>;
};
+ dc_12v: dc-12v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
ext_gmac: ext_gmac {
compatible = "fixed-clock";
clock-frequency = <125000000>;
@@ -27,6 +34,18 @@
#clock-cells = <0>;
};
+ vcc_host: vcc-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc_host";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+ };
+
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
enable-active-high;
@@ -35,18 +54,95 @@
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
+ vin-supply = <&vccio_1v8>;
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vccio_1v8: vccio-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vccio_3v3: vccio-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vdd_arm: vdd-arm-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 25000 1>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ pwm-supply = <&vcc_sys>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
+ power_key: power-key {
+ label = "GPIO Key Power";
+ gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ debounce-interval = <100>;
+ wakeup-source;
+ };
};
};
-&dmc {
- rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
- 0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
- 0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1
- 0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4
- 0x0 0x924>;
- rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
- rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
- 0 300 3 0 120>;
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&emmc {
+ cap-mmc-highspeed;
+ non-removable;
+ status = "okay";
};
&gmac {
@@ -65,27 +161,96 @@
status = "okay";
};
-&emmc {
- u-boot,dm-pre-reloc;
+&io_domains {
+ status = "okay";
+
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio4-supply = <&vccio_3v3>;
+};
+
+&pinctrl {
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm1 {
status = "okay";
};
-&sdmmc {
+&pwm2 {
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
status = "okay";
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- card-detect-delay = <200>;
- disable-wp;
- num-slots = <1>;
- supports-sd;
};
&uart2 {
- u-boot,dm-pre-reloc;
status = "okay";
};
-&usb20_otg {
- status = "okay";
+&u2phy0 {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <&vcc_host>;
+ status = "okay";
+ };
+};
+
+&u2phy1 {
+ status = "okay";
+
+ u2phy1_otg: otg-port {
+ phy-supply = <&vcc_host>;
+ status = "okay";
+ };
+
+ u2phy1_host: host-port {
+ phy-supply = <&vcc_host>;
+ status = "okay";
+ };
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_ehci {
+ status = "okay";
+};
+
+&usb_host2_ohci {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
};
diff --git a/arch/arm/dts/rk3229.dtsi b/arch/arm/dts/rk3229.dtsi
new file mode 100644
index 00000000..c340fb30
--- /dev/null
+++ b/arch/arm/dts/rk3229.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include "rk322x.dtsi"
+
+/ {
+ compatible = "rockchip,rk3229";
+
+ /delete-node/ opp-table0;
+
+ cpu0_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <40000>;
+ opp-suspend;
+ };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ };
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1175000>;
+ };
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1275000>;
+ };
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1325000>;
+ };
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1375000>;
+ };
+ opp-1464000000 {
+ opp-hz = /bits/ 64 <1464000000>;
+ opp-microvolt = <1400000>;
+ };
+ };
+};
--
2.20.1
next prev parent reply other threads:[~2022-02-07 3:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-07 3:47 [PATCH v1 01/15] rockchip: rk3228-power: sync power domain dt-binding header from Linux Johan Jonker
2022-02-07 3:47 ` [PATCH v1 02/15] rockchip: rk3228-cru: sync the clock " Johan Jonker
2022-02-26 18:36 ` Simon Glass
2022-02-07 3:47 ` [PATCH v1 03/15] arm: dts: rockchip: sync rk322x.dtsi " Johan Jonker
2022-02-07 3:47 ` Johan Jonker [this message]
2022-02-07 3:47 ` [PATCH v1 05/15] rockchip: rk3288-power: sync power domain dt-binding header " Johan Jonker
2022-02-26 18:36 ` Simon Glass
2022-02-07 3:47 ` [PATCH v1 06/15] rockchip: rk3288-cru: sync the clock " Johan Jonker
2022-02-26 18:36 ` Simon Glass
2022-02-07 3:47 ` [PATCH v1 07/15] arm: dts: rockchip: sync rk3288.dtsi " Johan Jonker
2022-02-07 3:47 ` [PATCH v1 08/15] arm: dts: rockchip: move all rk3288 u-boot specific properties in separate dtsi files Johan Jonker
2022-02-07 3:47 ` [PATCH v1 09/15] rockchip: fix boot_devices constants Johan Jonker
2022-02-26 18:36 ` Simon Glass
2022-02-07 3:47 ` [PATCH v1 10/15] arm: dts: rockchip: sync rk3288 DT boards from Linux Johan Jonker
2022-02-07 3:47 ` [PATCH v1 11/15] arm: dts: rockchip: rename mipi_dsi label in rk3288-evb.dtsi Johan Jonker
2022-02-26 18:36 ` Simon Glass
2022-02-07 3:47 ` [PATCH v1 12/15] arm: dts: rockchip: remove hdmi_audio node from rk3288-veyron.dtsi Johan Jonker
2022-02-26 18:36 ` Simon Glass
2022-02-07 3:47 ` [PATCH v1 13/15] arm: dts: rockchip: move all rk3288-veyron u-boot related properties Johan Jonker
2022-02-07 3:47 ` [PATCH v1 14/15] arm: dts: rockchip: sync rk3288-veyron DT from Linux Johan Jonker
2022-02-07 3:47 ` [PATCH v1 15/15] arm: dts: rockchip: rk3288-evb: fix memory reg value Johan Jonker
2022-02-26 18:36 ` [PATCH v1 01/15] rockchip: rk3228-power: sync power domain dt-binding header from Linux Simon Glass
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