From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27A36C433EF for ; Tue, 15 Feb 2022 10:24:36 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 92F6883689; Tue, 15 Feb 2022 11:24:28 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="QXPlt0CS"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DE341832DB; Tue, 15 Feb 2022 11:24:12 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0464983504 for ; Tue, 15 Feb 2022 11:24:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 27FAB612D7; Tue, 15 Feb 2022 10:24:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67BD7C340ED; Tue, 15 Feb 2022 10:24:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644920640; bh=JRlYvfsFHKtT9y4YGH6eqkaMx/vycC+F257Asq5qTyQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QXPlt0CSU/blo3TkhVrLE21od85cRqIi7BYBRwWnUZXUbLpxsZMJ1KztTkt7Hbk3b ObgU0f0ZpHW7nnXKFpffXRZuQ2J3SBQRxFd5dSmNN0Eh4S3oQDIZx2Vo0vo3xs0Ifc HX96lxCjwDP+SH6xRYLx3BBqOIU1i3pj8sFxd9XBrklUGlJpNkU3dcB9nWzXGcxMFC BUHHWe31B2OkUMgmgDjBovsQwIjp+HjpMvZ08hmvLUxaOYvH4fkqmWC2f4IAp9FMX/ mqqfgNY6vEJTCA4AeIvFxJyGh162fqdMBy/6aORIlwxN/K56cFtC/acDv+FM5J9x4y GqsCBCoQP27ug== Received: by pali.im (Postfix) id 2F6BE13D7; Tue, 15 Feb 2022 11:23:58 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 2/3] arm: a37xx: pci: Register controller also when no PCIe card is connected Date: Tue, 15 Feb 2022 11:23:36 +0100 Message-Id: <20220215102337.18426-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220215102337.18426-1-pali@kernel.org> References: <20220215102337.18426-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Allow access to config space of PCIe Root Port (which is always present on the root bus) even when PCIe link is down or no card is connected. Signed-off-by: Pali Rohár --- drivers/pci/pci-aardvark.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index ccaeecaca8e3..c795ef10b884 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -645,11 +645,8 @@ retry: * @pcie: The PCI device to access * * Wait up to 1 second for link training to be accomplished. - * - * Return 1 (true) if link training ends up with link up success. - * Return 0 (false) if link training ends up with link up failure. */ -static int pcie_advk_wait_for_link(struct pcie_advk *pcie) +static void pcie_advk_wait_for_link(struct pcie_advk *pcie) { int retries; @@ -657,15 +654,13 @@ static int pcie_advk_wait_for_link(struct pcie_advk *pcie) for (retries = 0; retries < LINK_MAX_RETRIES; retries++) { if (pcie_advk_link_up(pcie)) { printf("PCIe: Link up\n"); - return 0; + return; } udelay(LINK_WAIT_TIMEOUT); } printf("PCIe: Link down\n"); - - return -ETIMEDOUT; } /* @@ -898,8 +893,7 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie) return -EINVAL; /* Wait for PCIe link up */ - if (pcie_advk_wait_for_link(pcie)) - return -ENXIO; + pcie_advk_wait_for_link(pcie); return 0; } -- 2.20.1