From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10873C433EF for ; Wed, 16 Feb 2022 10:19:33 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 892A983A53; Wed, 16 Feb 2022 11:19:27 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="RFoZF34P"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 19E4083A69; Wed, 16 Feb 2022 11:19:14 +0100 (CET) Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D189D83A5A for ; Wed, 16 Feb 2022 11:19:04 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7D3EAB81E5F; Wed, 16 Feb 2022 10:19:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 27F70C004E1; Wed, 16 Feb 2022 10:19:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645006743; bh=ts4qWXQ4Wx4q2fCqFkw3vEWZcbyz2TpG8jCwpD8vI5Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RFoZF34PIJG/hGED8I8QHGJUjUtVwGsvmacX+sEfAGATRD/oVlmqWx0hAaBavPcJg J0b9GPQgHIDa+eSPMwT0X5RmZFwd5xH3WsZ/mHM2LuVWg+XC9/+0yZrn5C/tJzosY2 /dRL1O4VobI9U9IZcSLF8MhhA2cgbm2OjKqZZ7CButrIoILkoJCTloV+1cu9QQsjCW rO7MetJaaVZ4KDDP/QzdvGmHrBgmXd4C188BldGhmXVwy0jtM9cbt3RJE9zKby4bdu RAJmYZIIJm/MkchUPHggXaJw4xySRAgIIiiiwr8tSQRFVamDJgiLkyOO+eYbtXT4zv o4wToZLm1XD4w== Received: by pali.im (Postfix) id 0AD332B4E; Wed, 16 Feb 2022 11:19:01 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-mvebu v2 2/3] arm: mvebu: a37xx: Map CCI-400 and AP BootROM address space Date: Wed, 16 Feb 2022 11:18:44 +0100 Message-Id: <20220216101845.18638-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220216101845.18638-1-pali@kernel.org> References: <20220214232835.12924-1-pali@kernel.org> <20220216101845.18638-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean In function build_mem_map() prepare also mapping for CCI-400 and BootROM windows. BootROM window is 1 MB long and by default starts at address 0xfff00000. A53 AP BootROM is 16 kB long and repeats in this BootROM window 64 times. RVBAR_EL3 register is set to value 0xffff0000, so by default A53 AP BootROM is accessed via range 0xffff0000-0xffff3fff. CCI-400 window when new TF-A version is used, starts at address 0xfe000000 and when old TF-A version is used, starts at address 0xd8000000. Physical addresses are read directly from mvebu registers, so if TF-A remaps it in future (again) then it would not cause any issue for U-Boot. Signed-off-by: Pali Rohár --- Changes in v2: * Use SZ_* macros for sizes * Fix size of BootROM window * Fix commit message about 1 MB BootROM window vs 16 kB BootROM code --- arch/arm/mach-mvebu/armada3700/cpu.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c index 57a811b36ac6..e9bdc181ef02 100644 --- a/arch/arm/mach-mvebu/armada3700/cpu.c +++ b/arch/arm/mach-mvebu/armada3700/cpu.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -46,8 +47,10 @@ #define MVEBU_CPU_DEC_WIN_REMAP(w) (MVEBU_CPU_DEC_WIN_CTRL(w) + 0xc) #define MVEBU_CPU_DEC_WIN_GRANULARITY 16 #define MVEBU_CPU_DEC_WINS 5 +#define MVEBU_CPU_DEC_CCI_BASE (MVEBU_CPU_DEC_WIN_REG_BASE + 0xe0) +#define MVEBU_CPU_DEC_ROM_BASE (MVEBU_CPU_DEC_WIN_REG_BASE + 0xf4) -#define MAX_MEM_MAP_REGIONS (MVEBU_CPU_DEC_WINS + 2) +#define MAX_MEM_MAP_REGIONS (MVEBU_CPU_DEC_WINS + 4) #define A3700_PTE_BLOCK_NORMAL \ (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE) @@ -110,8 +113,26 @@ static int get_cpu_dec_win(int win, u32 *tgt, u32 *base, u32 *size) static void build_mem_map(void) { int win, region; + u32 reg; region = 1; + + /* CCI-400 */ + reg = readl(MVEBU_CPU_DEC_CCI_BASE); + mvebu_mem_map[region].phys = reg << 20; + mvebu_mem_map[region].virt = reg << 20; + mvebu_mem_map[region].size = SZ_64K; + mvebu_mem_map[region].attrs = A3700_PTE_BLOCK_DEVICE; + ++region; + + /* AP BootROM */ + reg = readl(MVEBU_CPU_DEC_ROM_BASE); + mvebu_mem_map[region].phys = reg << 20; + mvebu_mem_map[region].virt = reg << 20; + mvebu_mem_map[region].size = SZ_1M; + mvebu_mem_map[region].attrs = A3700_PTE_BLOCK_NORMAL; + ++region; + for (win = 0; win < MVEBU_CPU_DEC_WINS; ++win) { u32 base, tgt, size; u64 attrs; -- 2.20.1