From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5DBC4C433EF for ; Thu, 17 Feb 2022 09:27:39 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4756E83AA3; Thu, 17 Feb 2022 10:27:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="napTy4tm"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B3CE283A6A; Thu, 17 Feb 2022 10:27:13 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C77C883B55 for ; Thu, 17 Feb 2022 10:27:00 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 87A8261CDC; Thu, 17 Feb 2022 09:26:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D8B1C340E8; Thu, 17 Feb 2022 09:26:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645090018; bh=KQURKMcfHmqHAn3XgXy3DrNHv3bQLOrZybjtsENduG4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=napTy4tmXw0Nc3M7XwHUo3ZmVjpAAxWr+nSRaPQc0v38HOkxuhsBw7M+gMhvSYlWk K9SnfNdz9ayewFDCWk9qI3nL+TDhNt97y7BH9IavRk0JosB7Bur3T6mhV/hfdBId4x o7ZqKw/iIUvpk7QL88Pa21wAvGakcer5fu3CtKsaokHp5auK4Tyw59chmYnbGa2IS/ i4kN1SgJ9Im6QhDhigUOBNPSz9/dw9gL5O3b9Dec/KC632FkwFSpm1ivm64WpZiG2P 11l7tIak8DjrUjZMy5KdVJ9g4LsXn7oXra0AKIT4ihlgWT4HV9ptvhUsV1D+03FAk1 /ovxTkeNvG7qA== Received: by pali.im (Postfix) id 4690D1187; Thu, 17 Feb 2022 10:26:58 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Konstantin Porotchkin , Vladimir Vid Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-mvebu 4/5] arm: mvebu: a37xx: Extend mbox_do_cmd() code Date: Thu, 17 Feb 2022 10:26:18 +0100 Message-Id: <20220217092619.1445-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220217092619.1445-1-pali@kernel.org> References: <20220217092619.1445-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Allow to specify input parameters, define all available mbox commands supported by CZ.NIC secure firmware + Marvell fuse.bin firmware and fix parsing response from Marvell OTP commands. Signed-off-by: Pali Rohár --- arch/arm/mach-mvebu/armada3700/mbox.c | 16 ++++++++++++++-- arch/arm/mach-mvebu/include/mach/mbox.h | 19 ++++++++++++++++++- board/CZ.NIC/turris_mox/mox_sp.c | 4 ++-- 3 files changed, 34 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-mvebu/armada3700/mbox.c b/arch/arm/mach-mvebu/armada3700/mbox.c index cb86b967c2eb..b67346d524bf 100644 --- a/arch/arm/mach-mvebu/armada3700/mbox.c +++ b/arch/arm/mach-mvebu/armada3700/mbox.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2018 Marek Behun + * Copyright (C) 2021 Pali Rohár */ #include @@ -15,6 +16,7 @@ #define RWTM_CMD (RWTM_BASE + 0x40) #define RWTM_CMD_RETSTATUS (RWTM_BASE + 0x80) #define RWTM_CMD_STATUS(i) (size_t)(RWTM_BASE + 0x84 + (i) * 4) +#define MAX_ARGS 16 #define RWTM_HOST_INT_RESET (RWTM_BASE + 0xc8) #define RWTM_HOST_INT_MASK (RWTM_BASE + 0xcc) @@ -27,15 +29,23 @@ #define MBOX_STS_ERROR(s) ((s) & (3 << 30)) #define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff) #define MBOX_STS_CMD(s) ((s) & 0x3ff) +#define MBOX_STS_MARVELL_ERROR(s) ((s) == 0 ? 0 : (s) == 2 ? ETIMEDOUT : (s) == 3 ? EINVAL : (s) == 4 ? ENOSYS : EIO) -int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout) +int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nin, u32 *out, int nout) { const int tries = 50; int i; u32 status; + if (nin > MAX_ARGS || nout > MAX_ARGS) + return -EINVAL; + clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE); + for (i = 0; i < nin; i++) + writel(in[i], RWTM_CMD_PARAM(i)); + for (; i < MAX_ARGS; i++) + writel(0x0, RWTM_CMD_PARAM(i)); writel(cmd, RWTM_CMD); for (i = 0; i < tries; ++i) { @@ -57,9 +67,11 @@ int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout) setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); if (MBOX_STS_CMD(status) != cmd) - return -EIO; + return -MBOX_STS_MARVELL_ERROR(status); else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL) return -(int)MBOX_STS_VALUE(status); + else if (MBOX_STS_ERROR(status) == MBOX_STS_BADCMD) + return -ENOSYS; else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS) return -EIO; else diff --git a/arch/arm/mach-mvebu/include/mach/mbox.h b/arch/arm/mach-mvebu/include/mach/mbox.h index 981204935832..f1cb55f2bfe7 100644 --- a/arch/arm/mach-mvebu/include/mach/mbox.h +++ b/arch/arm/mach-mvebu/include/mach/mbox.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2018 Marek Behun + * Copyright (C) 2021 Pali Rohár */ #ifndef _MVEBU_MBOX_H @@ -16,8 +17,24 @@ enum mbox_cmd { MBOX_CMD_OTP_READ, MBOX_CMD_OTP_WRITE, + + MBOX_CMD_REBOOT, + + /* OTP read commands supported by Marvell fuse.bin firmware */ + MBOX_CMD_OTP_READ_1B = 257, + MBOX_CMD_OTP_READ_8B, + MBOX_CMD_OTP_READ_32B, + MBOX_CMD_OTP_READ_64B, + MBOX_CMD_OTP_READ_256B, + + /* OTP write commands supported by Marvell fuse.bin firmware */ + MBOX_CMD_OTP_WRITE_1B = 513, + MBOX_CMD_OTP_WRITE_8B, + MBOX_CMD_OTP_WRITE_32B, + MBOX_CMD_OTP_WRITE_64B, + MBOX_CMD_OTP_WRITE_256B, }; -int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nout); +int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nin, u32 *out, int nout); #endif diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c index 4de067bbebbb..93e96b014fca 100644 --- a/board/CZ.NIC/turris_mox/mox_sp.c +++ b/board/CZ.NIC/turris_mox/mox_sp.c @@ -19,7 +19,7 @@ const char *mox_sp_get_ecdsa_public_key(void) if (public_key[0]) return public_key; - res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, out, 16); + res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, NULL, 0, out, 16); if (res < 0) return NULL; @@ -47,7 +47,7 @@ int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram) u32 out[8]; int res; - res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, out, 8); + res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, NULL, 0, out, 8); if (res < 0) return res; -- 2.20.1