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[98.233.193.225]) by smtp.gmail.com with ESMTPSA id q12sm31597841qtx.51.2022.02.21.17.31.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Feb 2022 17:31:32 -0800 (PST) From: Peter Geis To: Cc: Peter Geis , u-boot@lists.denx.de Subject: [PATCH v1 00/11] rockchip fixes and extend rk3568 support Date: Mon, 21 Feb 2022 20:31:19 -0500 Message-Id: <20220222013131.3114990-1-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean to: Simon Glass to: Philipp Tomsich to: Kever Yang to: Lukasz Majewski to: Sean Anderson to: Peng Fan to: Jaehoon Chung to: Heiko Stübner cc: u-boot@lists.denx.de Good Evening, The following is a few patches for rockchip mainline u-boot support. Patches 1-3 are fixes for the rk3568 reset handler, rockchip emmc dma to sram, and building the rockchip-sfc driver. Patch 4 adds a sanity check for the minimum sfc frequency. Patch 5 and 6 add adc support to spl and enable the rockchip recovery handler in spl, before attempting to load u-boot. Patch 7 enables rk3568 spl bootrom device detection. Patch 8 enables automatic clock gating and other power saving features on rk3568, which solves the chip running hotter compared to downstream. Patch 9 and 10 move the dwc3 platform data to the chip specific code and enable dwc3 otg support on rk3568. Patch 11 is an RFC patch for fixing ram detection on rk3568. Downstream goes about this a different way, where they implemented a special library to handle this. Please review and *especially test* patch 11. Very Respectfully, Peter Geis Peter Geis (11): clk: rockchip: rk3568: fix reset handler mmc: sdhci: allow disabling sdma in spl spi: rockchip-sfc: fix building rockchip-sfc spi: rockchip-sfc: sanity check minimum freq spl: support adc drivers in spl rockchip: handle bootrom recovery mode in spl rockchip: rk3568: add boot device detection rockchip: rk3568: enable automatic clock gating rockchip: move dwc3 config to chip specific handler rockchip: rk3568: add dwc3 otg support [RFC] rockchip: rk356x: attempt to fix ram detection arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 6 +- arch/arm/mach-rockchip/board.c | 24 ------ arch/arm/mach-rockchip/boot_mode.c | 4 +- arch/arm/mach-rockchip/rk3399/rk3399.c | 29 +++++++ arch/arm/mach-rockchip/rk3568/rk3568.c | 112 +++++++++++++++++++++++++ arch/arm/mach-rockchip/sdram.c | 19 +++-- common/board_f.c | 7 ++ common/spl/Kconfig | 5 ++ drivers/Makefile | 1 + drivers/clk/rockchip/clk_rk3568.c | 2 + drivers/mmc/Kconfig | 7 ++ drivers/mmc/sdhci.c | 6 +- drivers/spi/rockchip_sfc.c | 6 ++ include/configs/rk3568_common.h | 5 ++ 15 files changed, 197 insertions(+), 37 deletions(-) -- 2.25.1