From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9A5CC433EF for ; Wed, 23 Feb 2022 13:18:34 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5108983CB0; Wed, 23 Feb 2022 14:18:15 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="kHOxIJpP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 18EE483C36; Wed, 23 Feb 2022 14:17:57 +0100 (CET) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C187B83CA0 for ; Wed, 23 Feb 2022 14:17:38 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6DD056153C; Wed, 23 Feb 2022 13:17:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C292C340E7; Wed, 23 Feb 2022 13:17:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645622257; bh=CF1mFNngZS21hRn3N2cAhY5IwQMgZc6MTVG2NK1gctQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kHOxIJpPjCyP/g3/MFjgD/dbcxrVGzzt+c0K4sKfbIdvKRj0oFyH6pJMmRgrDjhMb LNqebtyP+ln4uGd4N+i9esLozus8QeT/CaPnqJsxooogxeotF2otavFJ2a6VW2XLpZ Q8b1CXsVofnREuEvCLsBeUm/rqswm70Ip3f7elhkAcPNr2cyOyhVRAcNSBmRhZlWPY TYoRiIgB+p2VZBmJedpdz6WD8VMdEDDJW/3CvPrL8KVN1kzKSp+L63P6IALV3FcotR C4vYCuYYnVizGliPGIfR2SQs3/QehvrP6AuB7tB+fDt4MBjRnY/41/K4t4fmp8JEBP o6T4cXwgdKIaQ== Received: by pali.im (Postfix) id CA18689B; Wed, 23 Feb 2022 14:17:36 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Konstantin Porotchkin , Vladimir Vid Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-mvebu v3 5/5] arm: mvebu: a37xx: Add support for reading Security OTP values Date: Wed, 23 Feb 2022 14:15:49 +0100 Message-Id: <20220223131549.11991-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220223131549.11991-1-pali@kernel.org> References: <20220217092619.1445-1-pali@kernel.org> <20220223131549.11991-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean It is not possible for the A53 core (on which U-Boot is running) to read it directly. For this purpose Marvell defined mbox API for sending OTP commands between CM3 and A53 cores. Implement these Marvell fuse reading mbox commands via U-Boot fuse API. Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44 banks and words 0-2). Note that of the 67 bits, the 3 upper bits are: 1 lock bit and 2 auxiliary bits (meant for testing during the manufacture of the SOC, as I understand it). Also note that the lock bit and the auxiliary bits are not readable via Marvell commands. With CZ.NIC's commands the lock bit is readable. Write support is not implemented yet. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/armada3700/efuse.c | 39 ++++++++++++++++++++++++-- 1 file changed, 37 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mvebu/armada3700/efuse.c b/arch/arm/mach-mvebu/armada3700/efuse.c index 03778f17ea49..50c73f36c565 100644 --- a/arch/arm/mach-mvebu/armada3700/efuse.c +++ b/arch/arm/mach-mvebu/armada3700/efuse.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #define OTP_NB_REG_BASE ((void __iomem *)MVEBU_REGISTER(0x12600)) @@ -77,6 +78,41 @@ static void otp_read_parallel(void __iomem *base, u32 *data, u32 count) } } +static int rwtm_otp_read(u8 row, u32 word, u32 *data) +{ + u32 out[3]; + u32 in[2]; + int res = -EINVAL; + + if (word < 2) { + /* + * MBOX_CMD_OTP_READ_32B command is supported by Marvell + * fuse.bin firmware and also by new CZ.NIC wtmi firmware. + * This command returns raw bits without ECC corrections. + * It does not provide access to the lock bit. + */ + in[0] = row; + in[1] = word * 32; + res = mbox_do_cmd(MBOX_CMD_OTP_READ_32B, in, 2, out, 1); + if (!res) + *data = out[0]; + } else if (word == 2) { + /* + * MBOX_CMD_OTP_READ command is supported only by new CZ.NIC + * wtmi firmware and provides access to all bits, including + * lock bit without doing ECC corrections. For compatibility + * with Marvell fuse.bin firmware, use this command only for + * accessing lock bit. + */ + in[0] = row; + res = mbox_do_cmd(MBOX_CMD_OTP_READ, in, 1, out, 3); + if (!res) + *data = out[2]; + } + + return res; +} + /* * Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44 banks and words 0-2) * Bank 44 is used for accessing North Bridge OTP (69 bits via words 0-2) @@ -96,8 +132,7 @@ int fuse_read(u32 bank, u32 word, u32 *val) if (bank <= RWTM_MAX_BANK) { if (word >= RWTM_ROW_WORDS) return -EINVAL; - /* TODO: not implemented yet */ - return -ENOSYS; + return rwtm_otp_read(bank, word, val); } else if (bank == OTP_NB_BANK) { u32 data[OTP_NB_WORDS]; if (word >= OTP_NB_WORDS) -- 2.20.1