From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C53DC433F5 for ; Wed, 2 Mar 2022 11:50:28 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C5FEA83CB4; Wed, 2 Mar 2022 12:49:58 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="JVEuRxCT"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 25B5583C8E; Wed, 2 Mar 2022 12:49:44 +0100 (CET) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 312EA83C8F for ; Wed, 2 Mar 2022 12:49:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A837AB81FA3; Wed, 2 Mar 2022 11:49:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 107AEC340F2; Wed, 2 Mar 2022 11:49:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646221774; bh=qa73eCUwcMNRMjHFXqJQ9E9y3angbqpozPreyXV/0mY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JVEuRxCT16YTYLUP2VMHa0VLJbca00BoMe1QkClYxmCV2+KsKx48WOxTQSw8ZfTYq VSXYGlUijBo9LprvtKQuy7uZxn+hOHFI2FozTFNdtm46D3JVhBlgdMEU70qXQru7lg 1iFj5+zTlVaIxcy0DDmEwmYjrMCNXQAC//XV9vFHL9ap+0QbBBKSstDTVi5i1SXQla wUgqh8zImo5Ym546QRBvNehES1owfLDMxpfhxu97/Otq7uy+bR9/nw0EKjB1MvY0bJ 4FMu7KvVhCSA3WZv7RoomcMwlM/eTo1A/4+oXW7xDuwQmAdgOn1J354M6AKeXznDnE fgYcCrUGjOmMQ== Received: by pali.im (Postfix) id BCCBD677; Wed, 2 Mar 2022 12:49:33 +0100 (CET) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , =?UTF-8?q?Marek=20Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 4/8] arm: mvebu: turris_omnia: Define only one serdes map variable Date: Wed, 2 Mar 2022 12:47:54 +0100 Message-Id: <20220302114758.21787-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean By default use primary serdes map with PCIe function in combined miniPCIe/mSATA slot. When SATA is detected change serdes map variable at runtime. Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index a93af6c5b877..d4c41bb1797a 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -93,7 +93,7 @@ enum status_word_bits { #define OMNIA_GPP_POL_LOW 0x0 #define OMNIA_GPP_POL_MID 0x0 -static struct serdes_map board_serdes_map_pex[] = { +static struct serdes_map board_serdes_map[] = { {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, @@ -102,15 +102,6 @@ static struct serdes_map board_serdes_map_pex[] = { {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0} }; -static struct serdes_map board_serdes_map_sata[] = { - {SATA0, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0} -}; - static struct udevice *omnia_get_i2c_chip(const char *name, uint addr, uint offset_len) { @@ -256,13 +247,15 @@ void *env_sf_get_env_addr(void) int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { if (omnia_detect_sata()) { - *serdes_map_array = board_serdes_map_sata; - *count = ARRAY_SIZE(board_serdes_map_sata); - } else { - *serdes_map_array = board_serdes_map_pex; - *count = ARRAY_SIZE(board_serdes_map_pex); + /* Change SerDes for first mPCIe port (mSATA) from PCIe to SATA */ + board_serdes_map[0].serdes_type = SATA0; + board_serdes_map[0].serdes_speed = SERDES_SPEED_6_GBPS; + board_serdes_map[0].serdes_mode = SERDES_DEFAULT_MODE; } + *serdes_map_array = board_serdes_map; + *count = ARRAY_SIZE(board_serdes_map); + return 0; } -- 2.20.1