From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51A0BC433F5 for ; Thu, 3 Mar 2022 01:54:23 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7535383CBF; Thu, 3 Mar 2022 02:54:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 9B91D83CF0; Thu, 3 Mar 2022 02:54:18 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id F17D383C88 for ; Thu, 3 Mar 2022 02:54:14 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 52D401480; Wed, 2 Mar 2022 17:54:14 -0800 (PST) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 894FF3F73D; Wed, 2 Mar 2022 17:54:11 -0800 (PST) Date: Thu, 3 Mar 2022 01:53:46 +0000 From: Andre Przywara To: Jesse Taube Cc: u-boot@lists.denx.de, jagan@amarulasolutions.com, hdegoede@redhat.com, sjg@chromium.org, icenowy@aosc.io, marek.behun@nic.cz, festevam@denx.de, narmstrong@baylibre.com, tharvey@gateworks.com, christianshewitt@gmail.com, pbrobinson@gmail.com, jernej.skrabec@gmail.com, hs@denx.de, samuel@sholland.org, arnaud.ferraris@gmail.com, giulio.benetti@benettiengineering.com, thirtythreeforty@gmail.com Subject: Re: [PATCH v2 0/3] Add SPI boot to SPL on SUNIV/F1C100s Message-ID: <20220303015248.5ecc6d34@slackpad.lan> In-Reply-To: <8af92e65-cf73-adc7-b407-4f79d3851431@gmail.com> References: <20220212003235.2162334-1-Mr.Bossman075@gmail.com> <8af92e65-cf73-adc7-b407-4f79d3851431@gmail.com> Organization: Arm Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Mon, 28 Feb 2022 23:42:13 -0500 Jesse Taube wrote: Hi, > Hey just checking if you know about this set. > > This patch adds the ability to detect the BROM's boot source, > > as well as the ability to boot from SPI. So I fixed two more things (FEL booting and reset), and massaged the first patch a bit (fixing arm64 compilation, and protecting U-Boot proper operation). I pushed the result to sunxi/master[1], and plan to send a PR as soon as I can do some more testing: the Nano boots fine, via FEL, MMC, and SPI, but I need to check other boards as well. Please test this branch and scream if you are not happy! Cheers, Andre [1] https://source.denx.de/u-boot/custodians/u-boot-sunxi/-/commits/master/ > > > > Jesse Taube (3): > > mach-sunxi: Add boot device detection for SUNIV/F1C100s > > mach-sunxi: Add SPL SPI boot for SUNIV > > mach-sunxi: Enable SPI boot for SUNIV and licheepi nano > > > > arch/arm/include/asm/arch-sunxi/gpio.h | 1 + > > arch/arm/include/asm/arch-sunxi/spl.h | 10 +++++ > > arch/arm/mach-sunxi/Kconfig | 2 +- > > arch/arm/mach-sunxi/board.c | 57 +++++++++++++------------- > > arch/arm/mach-sunxi/spl_spi_sunxi.c | 24 +++++++---- > > configs/licheepi_nano_defconfig | 1 + > > 6 files changed, 58 insertions(+), 37 deletions(-) > >