* [PATCH 1/1] video: mxsfb: fix pixel clock polarity
@ 2021-11-26 14:48 Sébastien Szymanski
2022-01-15 14:16 ` Fabio Estevam
2022-03-14 22:39 ` Anatolij Gustschin
0 siblings, 2 replies; 3+ messages in thread
From: Sébastien Szymanski @ 2021-11-26 14:48 UTC (permalink / raw)
To: u-boot; +Cc: Julien Boibessot, Sébastien Szymanski
DISPLAY_FLAGS_PIXDATA_NEGEDGE means the controller drives the data on
pixel clocks falling edge. That is DOTCLK_POL=0 (default) not 1.
The same change has been made on the Linux's driver:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mxsfb?h=v5.16-rc2&id=53990e416bb7adaa59d045f325a47f31a11b75ee
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
drivers/video/mxsfb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 98d2965711..7aeea4b23f 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -161,7 +161,7 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr,
vdctrl0 |= LCDIF_VDCTRL0_HSYNC_POL;
if(flags & DISPLAY_FLAGS_VSYNC_HIGH)
vdctrl0 |= LCDIF_VDCTRL0_VSYNC_POL;
- if(flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if(flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
vdctrl0 |= LCDIF_VDCTRL0_DOTCLK_POL;
if(flags & DISPLAY_FLAGS_DE_HIGH)
vdctrl0 |= LCDIF_VDCTRL0_ENABLE_POL;
--
2.32.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] video: mxsfb: fix pixel clock polarity
2021-11-26 14:48 [PATCH 1/1] video: mxsfb: fix pixel clock polarity Sébastien Szymanski
@ 2022-01-15 14:16 ` Fabio Estevam
2022-03-14 22:39 ` Anatolij Gustschin
1 sibling, 0 replies; 3+ messages in thread
From: Fabio Estevam @ 2022-01-15 14:16 UTC (permalink / raw)
To: Sébastien Szymanski, Anatolij Gustschin
Cc: U-Boot-Denx, Julien Boibessot
Hi Sébastien,
[Adding Anatolij]
On Fri, Nov 26, 2021 at 1:49 PM Sébastien Szymanski
<sebastien.szymanski@armadeus.com> wrote:
>
> DISPLAY_FLAGS_PIXDATA_NEGEDGE means the controller drives the data on
> pixel clocks falling edge. That is DOTCLK_POL=0 (default) not 1.
>
> The same change has been made on the Linux's driver:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mxsfb?h=v5.16-rc2&id=53990e416bb7adaa59d045f325a47f31a11b75ee
>
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] video: mxsfb: fix pixel clock polarity
2021-11-26 14:48 [PATCH 1/1] video: mxsfb: fix pixel clock polarity Sébastien Szymanski
2022-01-15 14:16 ` Fabio Estevam
@ 2022-03-14 22:39 ` Anatolij Gustschin
1 sibling, 0 replies; 3+ messages in thread
From: Anatolij Gustschin @ 2022-03-14 22:39 UTC (permalink / raw)
To: Sébastien Szymanski; +Cc: u-boot, Julien Boibessot
Hi Sébastien,
On Fri, 26 Nov 2021 15:48:27 +0100
Sébastien Szymanski sebastien.szymanski@armadeus.com wrote:
> DISPLAY_FLAGS_PIXDATA_NEGEDGE means the controller drives the data on
> pixel clocks falling edge. That is DOTCLK_POL=0 (default) not 1.
I wanted to apply this patch for release, but testing on i.MX6UL 14x14
EVK board shows that there is display flickering. So it seems wrong
for the display used on the EVK board.
--
Anatolij
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-03-14 22:39 UTC | newest]
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2021-11-26 14:48 [PATCH 1/1] video: mxsfb: fix pixel clock polarity Sébastien Szymanski
2022-01-15 14:16 ` Fabio Estevam
2022-03-14 22:39 ` Anatolij Gustschin
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