From: Tom Rini <trini@konsulko.com>
To: Sam Shih <sam.shih@mediatek.com>
Cc: Ryder Lee <ryder.lee@mediatek.com>,
Weijie Gao <weijie.gao@mediatek.com>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
u-boot@lists.denx.de
Subject: Re: [1/3] pinctrl: mediatek: rewrite mtk_pinconf_set and related functions
Date: Fri, 25 Mar 2022 16:42:27 -0400 [thread overview]
Message-ID: <20220325204227.GA2226424@bill-the-cat> (raw)
In-Reply-To: <20220310043145.7690-2-sam.shih@mediatek.com>
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On Thu, Mar 10, 2022 at 12:31:43PM +0800, Sam Shih wrote:
> There are many pins in a SoCs, and different pin may belong
> to different "io_type", For example: some pins of MT7622 belongs
> to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
> means handle pinconf via "io_type A" or "io_type B", so SoCs that
> contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
>
> This patch separates the implementation of register operations
> (e.g: "bias-pull-up/down", "driving" and "input-enable") into
> different functions, and lets the original V0/V1
> ops to call the new functions.
>
> Signed-off-by: Sam Shih <sam.shih@mediatek.com>
This series breaks mt7623a_unielec_u7623_02 and other mediatek
platforms, please retest and resubmit, thanks.
--
Tom
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next prev parent reply other threads:[~2022-03-25 20:42 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-10 4:31 [0/3] Add support for different mediatek pinctrl designs Sam Shih
2022-03-10 4:31 ` [1/3] pinctrl: mediatek: rewrite mtk_pinconf_set and related functions Sam Shih
2022-03-25 20:42 ` Tom Rini [this message]
2022-03-10 4:31 ` [2/3] pinctrl: mediatek: introduce multiple memory bases support Sam Shih
2022-03-10 4:31 ` [3/3] pinctrl: mediatek: add support for different types of IO pins Sam Shih
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