From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CD94C433F5 for ; Sun, 27 Mar 2022 17:23:27 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 28DFE836A9; Sun, 27 Mar 2022 19:23:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7715F8339D; Sun, 27 Mar 2022 19:23:22 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 597F4837DE for ; Sun, 27 Mar 2022 19:23:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6911F106F; Sun, 27 Mar 2022 10:23:16 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 21CE43F73B; Sun, 27 Mar 2022 10:23:15 -0700 (PDT) Date: Sun, 27 Mar 2022 18:22:21 +0100 From: Andre Przywara To: Samuel Holland Cc: u-boot@lists.denx.de, Jagan Teki , Sean Anderson , Simon Glass , Heinrich Schuchardt , Heiko Schocher , Joe Hershberger Subject: Re: [PATCH v2 13/23] pinctrl: sunxi: Add I2C pinmuxes Message-ID: <20220327182221.0b58601f@slackpad.lan> In-Reply-To: <20220318035420.15058-14-samuel@sholland.org> References: <20220318035420.15058-1-samuel@sholland.org> <20220318035420.15058-14-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Thu, 17 Mar 2022 22:54:10 -0500 Samuel Holland wrote: Hi, > Where multiple options were available, the one matching board.c and the > device trees was chosen. > > Pin lists and mux values were taken from the Linux drivers. > > Signed-off-by: Samuel Holland > --- > > (no changes since v1) > > drivers/pinctrl/sunxi/pinctrl-sunxi.c | 37 +++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > index 2de793689a..3a2fbee324 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c > +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > @@ -225,6 +225,8 @@ static int sunxi_pinctrl_probe(struct udevice *dev) > static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 3 }, /* PE11-PE12 */ > + { "i2c1", 3 }, /* PD5-PD6 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -243,6 +245,8 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = { > { "emac", 2 }, /* PA0-PA17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PB0-PB1 */ > + { "i2c1", 2 }, /* PB18-PB19 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -261,6 +265,8 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = { > { "emac", 2 }, /* PA0-PA17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PB0-PB1 */ > + { "i2c1", 2 }, /* PB15-PB16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -280,6 +286,8 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = { > { "gmac", 2 }, /* PA0-PA27 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PH14-PH15 */ > + { "i2c1", 2 }, /* PH16-PH17 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -297,6 +305,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun6i_a31_pinctrl_desc = { > static const struct sunxi_pinctrl_function sun6i_a31_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 2 }, /* PL0-PL1 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; > > @@ -312,6 +321,8 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = { > { "gmac", 5 }, /* PA0-PA17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PB0-PB1 */ > + { "i2c1", 2 }, /* PB18-PB19 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -329,6 +340,8 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun7i_a20_pinctrl_desc = { > static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PH2-PH3 */ > + { "i2c1", 2 }, /* PH4-PH5 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #endif > @@ -346,6 +359,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a23_pinctrl_desc = { > static const struct sunxi_pinctrl_function sun8i_a23_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 3 }, /* PL0-PL1 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; > > @@ -359,6 +373,8 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a23_r_pinctrl_desc = > static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PH2-PH3 */ > + { "i2c1", 2 }, /* PH4-PH5 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -379,6 +395,8 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = { > { "gmac", 4 }, /* PD2-PD23 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PH0-PH1 */ > + { "i2c1", 2 }, /* PH2-PH3 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -398,6 +416,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a83t_pinctrl_desc = > static const struct sunxi_pinctrl_function sun8i_a83t_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 2 }, /* PL8-PL9 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; > > @@ -412,6 +431,8 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = { > { "emac", 2 }, /* PD0-PD17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PA11-PA12 */ > + { "i2c1", 3 }, /* PA18-PA19 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -431,6 +452,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_h3_pinctrl_desc = { > static const struct sunxi_pinctrl_function sun8i_h3_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 2 }, /* PL0-PL1 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; > > @@ -445,6 +467,8 @@ static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = { > { "emac", 4 }, /* PD0-PD17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PB6-PB7 */ > + { "i2c1", 2 }, /* PB8-PB9 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -465,6 +489,8 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = { > { "gmac", 2 }, /* PA0-PA17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PH0-PH1 */ > + { "i2c1", 2 }, /* PH2-PH3 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -482,6 +508,8 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun9i_a80_pinctrl_desc = { > static const struct sunxi_pinctrl_function sun9i_a80_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c0", 2 }, /* PN0-PN1 */ > + { "s_i2c1", 3 }, /* PM8-PM9 */ > { "s_uart", 3 }, /* PL0-PL1 */ > }; > > @@ -496,6 +524,8 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = { > { "emac", 4 }, /* PD8-PD23 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PH0-PH1 */ > + { "i2c1", 2 }, /* PH2-PH3 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -515,6 +545,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_a64_pinctrl_desc = > static const struct sunxi_pinctrl_function sun50i_a64_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 2 }, /* PL8-PL9 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; > > @@ -529,6 +560,8 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = { > { "emac", 2 }, /* PD0-PD17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PA11-PA12 */ > + { "i2c1", 2 }, /* PA18-PA19 */ According to both the user manual and the Linux driver this should be a mux value of 3 (I guess mix up with I2S vs. I2C) Cheers, Andre > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -549,6 +582,8 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = { > { "emac", 5 }, /* PD0-PD20 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "i2c0", 2 }, /* PD25-PD26 */ > + { "i2c1", 4 }, /* PH5-PH6 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -567,6 +602,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_pinctrl_desc = { > static const struct sunxi_pinctrl_function sun50i_h6_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 3 }, /* PL0-PL1 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; > > @@ -599,6 +635,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h616_pinctrl_desc = > static const struct sunxi_pinctrl_function sun50i_h616_r_pinctrl_functions[] = { > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "s_i2c", 3 }, /* PL0-PL1 */ > { "s_uart", 2 }, /* PL2-PL3 */ > }; >