From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBCD2C433EF for ; Wed, 30 Mar 2022 10:15:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BFDEE84175; Wed, 30 Mar 2022 12:11:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1648635105; bh=LswpfP/Gb+e41duJgPWQbZs4OUZklZbXHwvgeEsTmvE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=Io4HYIyoeL+k3jFWKrsj/JCyhrCp/jvC/Nrj+bRhjLC9uE3YkwSFLbkRgdm5xuhZJ +9oA+39dPivYPNR1b1+2yneJMS2rvk0f1wG2/p3JByUOOfv77+r7ukUm7wgIL118RS CTb8YA7WfiAXLlD4wGzY+EXsb8ESI97txLrFCu9N0lT+l4/i1T1D6ry3vBTFBU44gA 8w1Tjmcd3tleke24uQ1CYoGJla8QRCnPvyDDQLh+FnM9sIyYh5D+ueF/E9Cq5vMtFX YxboSBwcJNh/bgjRDDNkvDcWARSPzoFJHnjWeLfmIWCEfipJ4ey8gX383M5R3egy4c 4wz3mjuUW9DVQ== Received: by phobos.denx.de (Postfix, from userid 109) id D862280F91; Wed, 30 Mar 2022 12:09:19 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [91.198.250.252]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5A90D84115 for ; Wed, 30 Mar 2022 12:08:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp102.mailbox.org (unknown [91.198.250.119]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4KT2FD53dGz9sR9; Wed, 30 Mar 2022 12:08:16 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: awilliams@marvell.com, cchavva@marvell.com Subject: [PATCH 44/52] mips: octeon: cpu.c: Move bootmem init to arch_early_init_r() Date: Wed, 30 Mar 2022 12:07:20 +0200 Message-Id: <20220330100728.871561-45-sr@denx.de> In-Reply-To: <20220330100728.871561-1-sr@denx.de> References: <20220330100728.871561-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Call octeon_bootmem_init() earlier in the boot process, so that this bootmemory infrastructure is already initialized when e.g. the networking support gets probed. Signed-off-by: Stefan Roese --- arch/mips/Kconfig | 1 + arch/mips/mach-octeon/cpu.c | 13 ++++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 28234aa0bb6c..34376511daee 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -101,6 +101,7 @@ config ARCH_JZ47XX config ARCH_OCTEON bool "Support Marvell Octeon CN7xxx platforms" + select ARCH_EARLY_INIT_R select CPU_CAVIUM_OCTEON select DISPLAY_CPUINFO select DMA_ADDR_T_64BIT diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c index 6cfcc3eae04e..fffd9dfb8580 100644 --- a/arch/mips/mach-octeon/cpu.c +++ b/arch/mips/mach-octeon/cpu.c @@ -393,14 +393,25 @@ static int init_bootcmd_console(void) return ret; } -int arch_misc_init(void) +int arch_early_init_r(void) { int ret; + /* + * Needs to be called pretty early, so that e.g. networking etc + * can access the bootmem infrastructure + */ ret = octeon_bootmem_init(); if (ret) return ret; + return 0; +} + +int arch_misc_init(void) +{ + int ret; + ret = octeon_configure_load_memory(); if (ret) return ret; -- 2.35.1