From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82D73C433F5 for ; Wed, 30 Mar 2022 10:12:15 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7576383FBB; Wed, 30 Mar 2022 12:10:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1648635050; bh=6pCg42NF+himTiqD+BLSXL7v1Pfc0631T8ZAtJ36OYs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=iHQocCybL4bmppYjO3ol4vJ/ikbm2eWpGleM8qLesm7SRQVokcLTj3MJ4KXmAl2ND ZaIf/9JQv8ttW6PhxdCYU6unrNctEMP7Emz0pM5JLTwTAFv8EYEStrUmYA8Z2P9nS7 9jQNdRSoUPCHu9FcemLC2dmEhQwDEvx7NnmZxthAW0IVt9HaNezuy/mLfxS3I7yN2a EdhVGzV0ElVnxakDUlshvHOddwLYPwA+P8yAFg760hSAqfEy9JLHeLf6F9FFGEMPDC cG7Hf2nP/B8SzZ2CviIFyfiPL9TjmNK8D1CYiJ4nYGyUdi5058669r1qlH1lMh7Yzf KnqyLuzSi+wQA== Received: by phobos.denx.de (Postfix, from userid 109) id AD40384128; Wed, 30 Mar 2022 12:08:53 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [91.198.250.252]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3BC14840FE for ; Wed, 30 Mar 2022 12:08:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp102.mailbox.org (smtp102.mailbox.org [IPv6:2001:67c:2050:105:465:1:3:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4KT2FB0fQVz9sSH; Wed, 30 Mar 2022 12:08:14 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: awilliams@marvell.com, cchavva@marvell.com Subject: [PATCH 46/52] mips: octeon: octeon_common.h: Move init SP because of increased image size Date: Wed, 30 Mar 2022 12:07:22 +0200 Message-Id: <20220330100728.871561-47-sr@denx.de> In-Reply-To: <20220330100728.871561-1-sr@denx.de> References: <20220330100728.871561-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean This patch moves CONFIG_SYS_INIT_SP_OFFSET to a higher address so that it does not interfere with larger U-Boot images. This was noticed, while adding network support to the EBB7304 board. Signed-off-by: Stefan Roese --- include/configs/octeon_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 23bb4f676f8e..884745d514a3 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -8,7 +8,7 @@ #define __OCTEON_COMMON_H__ #if defined(CONFIG_RAM_OCTEON) -#define CONFIG_SYS_INIT_SP_OFFSET 0x20100000 +#define CONFIG_SYS_INIT_SP_OFFSET 0x20180000 #else /* No DDR init -> run in L2 cache with limited resources */ #define CONFIG_SYS_INIT_SP_OFFSET 0x00180000 -- 2.35.1