From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B675C433EF for ; Wed, 30 Mar 2022 10:14:22 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3BCB684164; Wed, 30 Mar 2022 12:11:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1648635088; bh=EQfiM5ohAakhxTk+zZfJGals1S2oFWZ4t7PTZwqO10s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=pEQXggV8S83c+U+yKaPlv4H0iOMUHD9LM7Zf4qo7NKspG0aowh2lSxQt3WPYoqXyz wo8wP6qWOsYAAUBth/HxO1VCymBwpLDHueiYws8LTGmCAkB/csV7VydK5y+4HLfwth ENaLnv/2hVa8xS6QBJAse58nGhI5lTF57+TVSSRINSXZHR0kqJ9R3JVw8dvkQXDDWK yGt9qP4YXI41EDfUz0Xc1s2qzC/HpLYO/XUGpoLNrvWucMuE5Wg28iAlPR++lSh9Hs yZQvzPS+ZIYdXVvul/SUjH9HqU5xFUj5gvC01niJWPdkq+LaEw5Zx8LPYLx9tI8hiU zWXWaVtIbVbQw== Received: by phobos.denx.de (Postfix, from userid 109) id CA2FB840EB; Wed, 30 Mar 2022 12:09:13 +0200 (CEST) Received: from mout-u-204.mailbox.org (mout-u-204.mailbox.org [IPv6:2001:67c:2050:1::465:204]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 242928410F for ; Wed, 30 Mar 2022 12:08:20 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp102.mailbox.org (unknown [91.198.250.119]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4KT2FH4K2Nz9sQP; Wed, 30 Mar 2022 12:08:19 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: awilliams@marvell.com, cchavva@marvell.com Subject: [PATCH 52/52] mips: octeon: nic23: Enable ethernet support Date: Wed, 30 Mar 2022 12:07:28 +0200 Message-Id: <20220330100728.871561-53-sr@denx.de> In-Reply-To: <20220330100728.871561-1-sr@denx.de> References: <20220330100728.871561-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean This patch enables the Kconfig symbols needed for full ethernet support on the NIC23. Additionally board specific setup is done, mostly GPIOs related to SFP / GPIO configuration. With this, ethernet can be used on this board. Here an example of a tftp load: => tftp ffffffff81000000 big Using ethernet-mac-nexus@11800e2000000 device TFTP from server 192.168.1.5; our IP address is 192.168.1.247 Filename 'big'. Load address: 0xffffffff81000000 Loading: ################################################## 10 MiB 9.7 MiB/s done Bytes transferred = 10485760 (a00000 hex) Signed-off-by: Stefan Roese --- board/Marvell/octeon_nic23/board.c | 87 +++++++++++++++++++++++++++++- configs/octeon_nic23_defconfig | 10 +++- 2 files changed, 95 insertions(+), 2 deletions(-) diff --git a/board/Marvell/octeon_nic23/board.c b/board/Marvell/octeon_nic23/board.c index 9f5eb2e2a182..3e2c54444397 100644 --- a/board/Marvell/octeon_nic23/board.c +++ b/board/Marvell/octeon_nic23/board.c @@ -1,10 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2021 Stefan Roese + * Copyright (C) 2021-2022 Stefan Roese */ #include #include +#include #include #include @@ -84,6 +85,52 @@ int board_fix_fdt(void *fdt) return rc; } +int board_early_init_f(void) +{ + struct gpio_desc gpio = {}; + ofnode node; + + /* Initial GPIO configuration */ + + /* GPIO 7: Vitesse reset */ + node = ofnode_by_compatible(ofnode_null(), "vitesse,vsc7224"); + if (ofnode_valid(node)) { + gpio_request_by_name_nodev(node, "los", 0, &gpio, GPIOD_IS_IN); + dm_gpio_free(gpio.dev, &gpio); + gpio_request_by_name_nodev(node, "reset", 0, &gpio, + GPIOD_IS_OUT); + if (dm_gpio_is_valid(&gpio)) { + /* Vitesse reset */ + debug("%s: Setting GPIO 7 to 1\n", __func__); + dm_gpio_set_value(&gpio, 1); + } + dm_gpio_free(gpio.dev, &gpio); + } + + /* SFP+ transmitters */ + ofnode_for_each_compatible_node(node, "ethernet,sfp-slot") { + gpio_request_by_name_nodev(node, "tx_disable", 0, + &gpio, GPIOD_IS_OUT); + if (dm_gpio_is_valid(&gpio)) { + debug("%s: Setting GPIO %d to 1\n", __func__, + gpio.offset); + dm_gpio_set_value(&gpio, 1); + } + dm_gpio_free(gpio.dev, &gpio); + gpio_request_by_name_nodev(node, "mod_abs", 0, &gpio, + GPIOD_IS_IN); + dm_gpio_free(gpio.dev, &gpio); + gpio_request_by_name_nodev(node, "tx_error", 0, &gpio, + GPIOD_IS_IN); + dm_gpio_free(gpio.dev, &gpio); + gpio_request_by_name_nodev(node, "rx_los", 0, &gpio, + GPIOD_IS_IN); + dm_gpio_free(gpio.dev, &gpio); + } + + return 0; +} + void board_configure_qlms(void) { octeon_configure_qlm(4, 3000, CVMX_QLM_MODE_SATA_2X1, 0, 0, 0, 0); @@ -100,7 +147,45 @@ void board_configure_qlms(void) int board_late_init(void) { + struct gpio_desc gpio = {}; + ofnode node; + + /* Turn on SFP+ transmitters */ + ofnode_for_each_compatible_node(node, "ethernet,sfp-slot") { + gpio_request_by_name_nodev(node, "tx_disable", 0, + &gpio, GPIOD_IS_OUT); + if (dm_gpio_is_valid(&gpio)) { + debug("%s: Setting GPIO %d to 0\n", __func__, + gpio.offset); + dm_gpio_set_value(&gpio, 0); + } + dm_gpio_free(gpio.dev, &gpio); + } + board_configure_qlms(); return 0; } + +int last_stage_init(void) +{ + struct gpio_desc gpio = {}; + ofnode node; + + node = ofnode_by_compatible(ofnode_null(), "vitesse,vsc7224"); + if (!ofnode_valid(node)) { + printf("Vitesse SPF DT node not found!"); + return 0; + } + + gpio_request_by_name_nodev(node, "reset", 0, &gpio, GPIOD_IS_OUT); + if (dm_gpio_is_valid(&gpio)) { + /* Take Vitesse retimer out of reset */ + debug("%s: Setting GPIO 7 to 0\n", __func__); + dm_gpio_set_value(&gpio, 0); + mdelay(50); + } + dm_gpio_free(gpio.dev, &gpio); + + return 0; +} diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 5427a9970a71..d44c650cef3c 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -12,6 +12,7 @@ CONFIG_ARCH_OCTEON=y CONFIG_TARGET_OCTEON_NIC23=y # CONFIG_MIPS_CACHE_SETUP is not set # CONFIG_MIPS_CACHE_DISABLE is not set +CONFIG_MIPS_RELOCATION_TABLE_SIZE=0xc000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y @@ -19,7 +20,9 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff80100000 CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_SYS_DEVICE_NULLDEV is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -37,6 +40,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0xe000 +CONFIG_TFTP_TSIZE=y CONFIG_SATA=y CONFIG_AHCI_MVEBU=y CONFIG_CLK=y @@ -50,7 +54,11 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y -# CONFIG_NETDEVICES is not set +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_DM_MDIO=y +CONFIG_DM_ETH_PHY=y +CONFIG_NET_OCTEON=y CONFIG_PCI=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -- 2.35.1