From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8184EC433EF for ; Wed, 30 Mar 2022 15:51:26 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id AD03383AAA; Wed, 30 Mar 2022 17:51:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=bootlin.com header.i=@bootlin.com header.b="dLiqIta/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4946283AAA; Wed, 30 Mar 2022 17:51:23 +0200 (CEST) Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 13E8884120 for ; Wed, 30 Mar 2022 17:51:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=clement.leger@bootlin.com Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 3FF17E0004; Wed, 30 Mar 2022 15:51:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1648655478; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jz8qq/xdfi/AggqIHejvbXizHR3ctBI7cZRXJm+wl5o=; b=dLiqIta/8xUTOophK2wTj+kuL6PirYzOotit6z1VZtEy3/Cpb8WhZkeVUbqoshiMfz+WoS vhcMCdOyqza1GMN4fZXsDVOGUzd6Trg9CHydKT819vw+h1SIZw/yd1+/BqGpej4L84qCtC RVfvLG0KSP3qXrLeRE3QhrfYMMZk9wdnKfnpJsHg/KDKrl4uK0d7qgIqr0YsunDDDk+R6f BFdjoN8Yl+hPh4awCTYqft2PaaJnxUaE1e4NW8G1y1MqSO0KWBO0O+nwCeVxDvlgh8HOBo UGZgwRHPfsfRf4GwNZJIRv/nAAeihgRjR1LCHhHd+8eno2smDR2CCY+qn2JrTw== Date: Wed, 30 Mar 2022 17:49:56 +0200 From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= To: Cc: , , , , Subject: Re: [PATCH v7 4/4] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER Message-ID: <20220330174956.04f10e5d@fixe.home> In-Reply-To: <20220322133508.31630f38@fixe.home> References: <20220311093539.72669-1-clement.leger@bootlin.com> <20220311093539.72669-5-clement.leger@bootlin.com> <20220322133508.31630f38@fixe.home> Organization: Bootlin X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Le Tue, 22 Mar 2022 13:35:08 +0100, Cl=C3=A9ment L=C3=A9ger a =C3=A9crit : > Le Tue, 22 Mar 2022 11:18:39 +0000, > a =C3=A9crit : >=20 [...] > >=20 > > Could not initialize timer (err -22) > >=20 > > ... > >=20 > >=20 > >=20 > > Could you investigate this please ? =20 >=20 > Hi Eugen, >=20 > Ok, I'll try to debug that ! Hi Eugen, while debugging it, I found that there was actually one major flaw. The clock that I used was the GLCK. If only this clock is enabled, the TCB can not work, the tcb0_clk must also be enabled for the TCB to start counting. It worked on my side because I forgot that I had a quirk in OP-TEE that was enabling the clocks before starting U-Boot. Without that, it actually could not work. Since the tcb0_clk is needed, I switched the driver to use this one only and it works well on a "bare" setup (ie without OP-TEE). I even think it could not work with the tcb0_gclk since this one does not correctly handles the case when the parent clock is the slow_clk (which might be the case after booting) and in this case, will return 0 as rate (this is by the way supported in your CCF branch). Anyway, I fixed the driver to use the tcb0_clk and thus it should work much better. I will send a V8 and it should work with U-Boot and the SPL. By the way, do you have any documentation which explains how to use U-Boot SPL on sama5d2_xplained (or other) board ? Regards, Cl=C3=A9ment. --=20 Cl=C3=A9ment L=C3=A9ger, Embedded Linux and Kernel engineer at Bootlin https://bootlin.com