From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24FF9C433F5 for ; Thu, 31 Mar 2022 23:33:16 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 20DB9842EF; Fri, 1 Apr 2022 01:25:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 160C1842B0; Fri, 1 Apr 2022 01:23:36 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 3A3F1842BA for ; Fri, 1 Apr 2022 01:22:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8726C139F; Thu, 31 Mar 2022 16:22:57 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 39A403F73B; Thu, 31 Mar 2022 16:22:56 -0700 (PDT) Date: Fri, 1 Apr 2022 00:20:11 +0100 From: Andre Przywara To: Samuel Holland Cc: u-boot@lists.denx.de, Jagan Teki , Sean Anderson , Simon Glass , Heinrich Schuchardt , Heiko Schocher , Joe Hershberger Subject: Re: [PATCH v2 11/23] pinctrl: sunxi: Add sun8i EMAC pinmuxes Message-ID: <20220401002011.3d089318@slackpad.lan> In-Reply-To: <20220318035420.15058-12-samuel@sholland.org> References: <20220318035420.15058-1-samuel@sholland.org> <20220318035420.15058-12-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Thu, 17 Mar 2022 22:54:08 -0500 Samuel Holland wrote: > Pin lists and mux values were taken from the Linux drivers. > > Signed-off-by: Samuel Holland Compared against the respective manuals. Reviewed-by: Andre Przywara Cheers, Andre > --- > > (no changes since v1) > > drivers/pinctrl/sunxi/pinctrl-sunxi.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > index 7540e7668a..2de793689a 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c > +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > @@ -376,6 +376,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a33_pinctrl_desc = { > }; > > static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = { > + { "gmac", 4 }, /* PD2-PD23 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F) > @@ -408,6 +409,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_a83t_r_pinctrl_desc > }; > > static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = { > + { "emac", 2 }, /* PD0-PD17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F) > @@ -440,6 +442,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun8i_h3_r_pinctrl_desc = > }; > > static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = { > + { "emac", 4 }, /* PD0-PD17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F) > @@ -490,6 +493,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun9i_a80_r_pinctrl_desc = > }; > > static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = { > + { "emac", 4 }, /* PD8-PD23 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F) > @@ -522,6 +526,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_a64_r_pinctrl_desc > }; > > static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = { > + { "emac", 2 }, /* PD0-PD17 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F) > @@ -541,6 +546,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h5_pinctrl_desc = { > }; > > static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = { > + { "emac", 5 }, /* PD0-PD20 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F) > @@ -572,6 +578,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_r_pinctrl_desc = > }; > > static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = { > + { "emac0", 2 }, /* PI0-PI16 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > #if IS_ENABLED(CONFIG_UART0_PORT_F)