From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD183C433EF for ; Thu, 31 Mar 2022 23:29:56 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C3149842C0; Fri, 1 Apr 2022 01:23:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 31BCC842C8; Fri, 1 Apr 2022 01:23:16 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id E274084288 for ; Fri, 1 Apr 2022 01:22:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A39F139F; Thu, 31 Mar 2022 16:22:47 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0682A3F73B; Thu, 31 Mar 2022 16:22:45 -0700 (PDT) Date: Fri, 1 Apr 2022 00:20:58 +0100 From: Andre Przywara To: Samuel Holland Cc: u-boot@lists.denx.de, Jagan Teki , Sean Anderson , Simon Glass , Heinrich Schuchardt , Heiko Schocher , Joe Hershberger Subject: Re: [PATCH v2 18/23] pinctrl: sunxi: Add MMC pinmuxes Message-ID: <20220401002058.610ef84c@slackpad.lan> In-Reply-To: <20220318035420.15058-19-samuel@sholland.org> References: <20220318035420.15058-1-samuel@sholland.org> <20220318035420.15058-19-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Thu, 17 Mar 2022 22:54:15 -0500 Samuel Holland wrote: > Pin lists and mux values were taken from the Linux drivers. > > Signed-off-by: Samuel Holland Compared against the respective manuals: Reviewed-by: Andre Przywara Cheers, Andre > --- > > (no changes since v1) > > drivers/pinctrl/sunxi/pinctrl-sunxi.c | 54 +++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > index 3a2fbee324..14d40a016b 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c > +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > @@ -227,6 +227,8 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 3 }, /* PE11-PE12 */ > { "i2c1", 3 }, /* PD5-PD6 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 3 }, /* PC0-PC2 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -247,6 +249,14 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PB0-PB1 */ > { "i2c1", 2 }, /* PB18-PB19 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > +#if IS_ENABLED(CONFIG_MMC1_PINS_PH) > + { "mmc1", 5 }, /* PH22-PH27 */ > +#else > + { "mmc1", 4 }, /* PG0-PG5 */ > +#endif > + { "mmc2", 3 }, /* PC6-PC15 */ > + { "mmc3", 2 }, /* PI4-PI9 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -267,6 +277,9 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PB0-PB1 */ > { "i2c1", 2 }, /* PB15-PB16 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG3-PG8 */ > + { "mmc2", 3 }, /* PC6-PC15 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -288,6 +301,10 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PH14-PH15 */ > { "i2c1", 2 }, /* PH16-PH17 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC6-PC15, PC24 */ > + { "mmc3", 4 }, /* PC6-PC15, PC24 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -323,6 +340,13 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PB0-PB1 */ > { "i2c1", 2 }, /* PB18-PB19 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > +#if IS_ENABLED(CONFIG_MMC1_PINS_PH) > + { "mmc1", 5 }, /* PH22-PH27 */ > +#else > + { "mmc1", 4 }, /* PG0-PG5 */ > +#endif > + { "mmc2", 3 }, /* PC5-PC15, PC24 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -342,6 +366,9 @@ static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PH2-PH3 */ > { "i2c1", 2 }, /* PH4-PH5 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC5-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #endif > @@ -375,6 +402,9 @@ static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PH2-PH3 */ > { "i2c1", 2 }, /* PH4-PH5 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC5-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -397,6 +427,9 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PH0-PH1 */ > { "i2c1", 2 }, /* PH2-PH3 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC5-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -433,6 +466,9 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PA11-PA12 */ > { "i2c1", 3 }, /* PA18-PA19 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC5-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -469,6 +505,9 @@ static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PB6-PB7 */ > { "i2c1", 2 }, /* PB8-PB9 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 2 }, /* PC0-PC10 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -491,6 +530,9 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PH0-PH1 */ > { "i2c1", 2 }, /* PH2-PH3 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC6-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 4 }, /* PF2-PF4 */ > #else > @@ -526,6 +568,9 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PH0-PH1 */ > { "i2c1", 2 }, /* PH2-PH3 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC1-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -562,6 +607,9 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PA11-PA12 */ > { "i2c1", 2 }, /* PA18-PA19 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC1-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -584,6 +632,9 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = { > { "gpio_out", 1 }, > { "i2c0", 2 }, /* PD25-PD26 */ > { "i2c1", 4 }, /* PH5-PH6 */ > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC1-PC14 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else > @@ -617,6 +668,9 @@ static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = { > { "emac0", 2 }, /* PI0-PI16 */ > { "gpio_in", 0 }, > { "gpio_out", 1 }, > + { "mmc0", 2 }, /* PF0-PF5 */ > + { "mmc1", 2 }, /* PG0-PG5 */ > + { "mmc2", 3 }, /* PC0-PC16 */ > #if IS_ENABLED(CONFIG_UART0_PORT_F) > { "uart0", 3 }, /* PF2-PF4 */ > #else