From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62520C433EF for ; Thu, 31 Mar 2022 23:27:52 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6304A842C7; Fri, 1 Apr 2022 01:23:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 59F9D84280; Fri, 1 Apr 2022 01:22:55 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id F3F8E8429E for ; Fri, 1 Apr 2022 01:22:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2E6EC15BF; Thu, 31 Mar 2022 16:22:37 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D55113F73B; Thu, 31 Mar 2022 16:22:35 -0700 (PDT) Date: Fri, 1 Apr 2022 00:21:27 +0100 From: Andre Przywara To: Samuel Holland Cc: u-boot@lists.denx.de, Jagan Teki , Sean Anderson , Simon Glass , Heinrich Schuchardt , Heiko Schocher , Joe Hershberger Subject: Re: [PATCH v2 23/23] spi: sun4i_spi: Remove non-DM pin setup Message-ID: <20220401002127.4036bb11@slackpad.lan> In-Reply-To: <20220318035420.15058-24-samuel@sholland.org> References: <20220318035420.15058-1-samuel@sholland.org> <20220318035420.15058-24-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Thu, 17 Mar 2022 22:54:20 -0500 Samuel Holland wrote: > This is now handled automatically by the pinctrl driver. > > Signed-off-by: Samuel Holland Again a nice cleanup! Reviewed-by: Andre Przywara Cheers, Andre > --- > > (no changes since v1) > > drivers/spi/spi-sunxi.c | 84 ----------------------------------------- > 1 file changed, 84 deletions(-) > > diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c > index d62355ec6f..b6cd7ddafa 100644 > --- a/drivers/spi/spi-sunxi.c > +++ b/drivers/spi/spi-sunxi.c > @@ -32,7 +32,6 @@ > #include > > #include > -#include > #include > > #include > @@ -180,87 +179,6 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable) > writel(reg, SPI_REG(priv, SPI_TCR)); > } > > -static int sun4i_spi_parse_pins(struct udevice *dev) > -{ > - const void *fdt = gd->fdt_blob; > - const char *pin_name; > - const fdt32_t *list; > - u32 phandle; > - int drive, pull = 0, pin, i; > - int offset; > - int size; > - > - list = fdt_getprop(fdt, dev_of_offset(dev), "pinctrl-0", &size); > - if (!list) { > - printf("WARNING: sun4i_spi: cannot find pinctrl-0 node\n"); > - return -EINVAL; > - } > - > - while (size) { > - phandle = fdt32_to_cpu(*list++); > - size -= sizeof(*list); > - > - offset = fdt_node_offset_by_phandle(fdt, phandle); > - if (offset < 0) > - return offset; > - > - drive = fdt_getprop_u32_default_node(fdt, offset, 0, > - "drive-strength", 0); > - if (drive) { > - if (drive <= 10) > - drive = 0; > - else if (drive <= 20) > - drive = 1; > - else if (drive <= 30) > - drive = 2; > - else > - drive = 3; > - } else { > - drive = fdt_getprop_u32_default_node(fdt, offset, 0, > - "allwinner,drive", > - 0); > - drive = min(drive, 3); > - } > - > - if (fdt_get_property(fdt, offset, "bias-disable", NULL)) > - pull = 0; > - else if (fdt_get_property(fdt, offset, "bias-pull-up", NULL)) > - pull = 1; > - else if (fdt_get_property(fdt, offset, "bias-pull-down", NULL)) > - pull = 2; > - else > - pull = fdt_getprop_u32_default_node(fdt, offset, 0, > - "allwinner,pull", > - 0); > - pull = min(pull, 2); > - > - for (i = 0; ; i++) { > - pin_name = fdt_stringlist_get(fdt, offset, > - "pins", i, NULL); > - if (!pin_name) { > - pin_name = fdt_stringlist_get(fdt, offset, > - "allwinner,pins", > - i, NULL); > - if (!pin_name) > - break; > - } > - > - pin = sunxi_name_to_gpio(pin_name); > - if (pin < 0) > - break; > - > - if (IS_ENABLED(CONFIG_MACH_SUN50I) || > - IS_ENABLED(CONFIG_SUN50I_GEN_H6)) > - sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0); > - else > - sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0); > - sunxi_gpio_set_drv(pin, drive); > - sunxi_gpio_set_pull(pin, pull); > - } > - } > - return 0; > -} > - > static inline int sun4i_spi_set_clock(struct udevice *dev, bool enable) > { > struct sun4i_spi_priv *priv = dev_get_priv(dev); > @@ -507,8 +425,6 @@ static int sun4i_spi_probe(struct udevice *bus) > return ret; > } > > - sun4i_spi_parse_pins(bus); > - > priv->variant = plat->variant; > priv->base = plat->base; > priv->freq = plat->max_hz;