From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 265A3C433F5 for ; Fri, 1 Apr 2022 13:44:16 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 87A8B842DE; Fri, 1 Apr 2022 15:42:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=semihalf.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=semihalf-com.20210112.gappssmtp.com header.i=@semihalf-com.20210112.gappssmtp.com header.b="gc3A3rMU"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id ECC40842D1; Fri, 1 Apr 2022 14:44:42 +0200 (CEST) Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2A1FD842E2 for ; Fri, 1 Apr 2022 14:44:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=semihalf.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=pan@semihalf.com Received: by mail-wr1-x429.google.com with SMTP id j18so4100060wrd.6 for ; Fri, 01 Apr 2022 05:44:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cnScaB4wbznPDUE+usQGzUCvUHBRa5XIjAYPV6TvXVU=; b=gc3A3rMUA+uudLJJnakob0lTuxDRU+Ye/VtWF/k0CCdr5PKQcnL6EbRLoEq8Ap914B BUqVJkYiT9f0I+Dj8IgSuwrAZaZluF9790su6CGT8mqsF5VfoqSKxqbkUGlwOMjQVWOr RDD6DX2PQhH9uLJv7lLX7zh90bYgLKZ+Z6w+0QIst/Txy4VTMztXMj3KPoJBifQo0V3W C46rN548jBycG5Rbnzt6nQoJ6HeJFzmuuWEp7tqWKK8wisF4zXAOOaWQBE/1pHaE4KD7 GIjjs0ZLxjsk5s5sfTemaBxRMJWJm4Y1U0p4+K7OZ1s9fSJPRZAgw+BPxISwYYti1wCs NrKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cnScaB4wbznPDUE+usQGzUCvUHBRa5XIjAYPV6TvXVU=; b=rL7aZig2ecdqP7AL+gYnhg8xzRFCcC/9s5tRuRIXa9mfPdFmSUeOawKeSR4U3NCgnu 6n2y8Qmy8dvOXIDOY/klYD0MPstoZDrkrXZ/BlSt0SCO6dOa6LHWINGiRzw21GrJ0FUo Sr/eDRDOAQCZ/0jsNY/e2gX/83UyLgQNi/4zGPDgEiDe+sZ9FmLBR7OLlNr6WtVe1sKp zdpRworcH7E+WgU3gn4hsy+3S1MYMsgjW4/YwGE4OESTdvyn24h8f4jiDjXv1S1nA3wt j2Xz3lxgzuciC+6kmNngC/Y4BzYhH/mNd8E0v0VNuqbqO0u2KYJ6sVKlqHNN1MPsAdb9 3BgA== X-Gm-Message-State: AOAM532Be4bfUh/fSsMIbTj6JqLb0D8dctP0Kg8VrLGYJdNYQCJSjHI6 DLqpyjeeb9XFtVAgphPW4WFGfg== X-Google-Smtp-Source: ABdhPJxmd1I1akcKiv2fLLulrtD8NAxdk9bb/eyt1lFEJ61KUsHD/0/aCl93zAVBdtu2ef05bNhEgg== X-Received: by 2002:adf:8296:0:b0:203:e8bc:7337 with SMTP id 22-20020adf8296000000b00203e8bc7337mr7630481wrc.118.1648817054243; Fri, 01 Apr 2022 05:44:14 -0700 (PDT) Received: from localhost.localdomain ([85.191.191.191]) by smtp.gmail.com with ESMTPSA id o10-20020a5d47ca000000b00203fb25165esm2478175wrc.6.2022.04.01.05.44.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 05:44:13 -0700 (PDT) From: =?UTF-8?q?Pawe=C5=82=20Anikiel?= To: marex@denx.de, simon.k.r.goldschmidt@gmail.com, tien.fong.chee@intel.com, michal.simek@xilinx.com Cc: u-boot@lists.denx.de, sjg@chromium.org, festevam@denx.de, jagan@amarulasolutions.com, andre.przywara@arm.com, narmstrong@baylibre.com, pbrobinson@gmail.com, tharvey@gateworks.com, paul.liu@linaro.org, christianshewitt@gmail.com, adrian.fiergolski@fastree3d.com, marek.behun@nic.cz, wd@denx.de, elly.siew.chin.lim@intel.com, mw@semihalf.com, =?UTF-8?q?Pawe=C5=82=20Anikiel?= Subject: [PATCH 09/11] socfpga: arria10: Improve bitstream loading speed Date: Fri, 1 Apr 2022 14:43:23 +0200 Message-Id: <20220401124325.1810108-10-pan@semihalf.com> X-Mailer: git-send-email 2.35.1.1094.g7c7d902a7c-goog In-Reply-To: <20220401124325.1810108-1-pan@semihalf.com> References: <20220401124325.1810108-1-pan@semihalf.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Fri, 01 Apr 2022 15:42:19 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Apply some optimizations to speed up bitstream loading (both for full and split periph/core bitstreams): * Change the size of the first fs read, so that all the subsequent reads are aligned to a specific value (called MAX_FIRST_LOAD_SIZE). This value was chosen so that in subsequent reads the fat fs driver doesn't have to allocate a temporary buffer in get_contents (assuming 8KiB clusters). * Change the buffer size to a larger value when reading to ddr (but not too large, because large transfers cause a stack overflow in the dwmmc driver). Signed-off-by: Paweł Anikiel --- drivers/fpga/socfpga_arria10.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index 798e3a3f90..07bfe3060e 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -30,6 +30,14 @@ #define FPGA_TIMEOUT_MSEC 1000 /* timeout in ms */ #define FPGA_TIMEOUT_CNT 0x1000000 #define DEFAULT_DDR_LOAD_ADDRESS 0x400 +#define DDR_BUFFER_SIZE 0x100000 + +/* When reading bitstream from a filesystem, the size of the first read is + * changed so that the subsequent reads are aligned to this value. This value + * was chosen so that in subsequent reads the fat fs driver doesn't have to + * allocate a temporary buffer in get_contents (assuming 8KiB clusters). + */ +#define MAX_FIRST_LOAD_SIZE 0x2000 DECLARE_GLOBAL_DATA_PTR; @@ -526,7 +534,8 @@ static void get_rbf_image_info(struct rbf_info *rbf, u16 *buffer) #ifdef CONFIG_FS_LOADER static int first_loading_rbf_to_buffer(struct udevice *dev, struct fpga_loadfs_info *fpga_loadfs, - u32 *buffer, size_t *buffer_bsize) + u32 *buffer, size_t *buffer_bsize, + size_t *buffer_bsize_ori) { u32 *buffer_p = (u32 *)*buffer; u32 *loadable = buffer_p; @@ -674,6 +683,7 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, } buffer_size = rbf_size; + *buffer_bsize_ori = DDR_BUFFER_SIZE; } debug("FPGA: External data: offset = 0x%x, size = 0x%x.\n", @@ -686,11 +696,16 @@ static int first_loading_rbf_to_buffer(struct udevice *dev, * chunk by chunk transfer is required due to smaller buffer size * compare to bitstream */ + + if (buffer_size > MAX_FIRST_LOAD_SIZE) + buffer_size = MAX_FIRST_LOAD_SIZE; + if (rbf_size <= buffer_size) { /* Loading whole bitstream into buffer */ buffer_size = rbf_size; fpga_loadfs->remaining = 0; } else { + buffer_size -= rbf_offset % buffer_size; fpga_loadfs->remaining -= buffer_size; } @@ -806,7 +821,8 @@ int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize, * function below. */ ret = first_loading_rbf_to_buffer(dev, &fpga_loadfs, &buffer, - &buffer_sizebytes); + &buffer_sizebytes, + &buffer_sizebytes_ori); if (ret == 1) { printf("FPGA: Skipping configuration ...\n"); return 0; -- 2.35.1.1094.g7c7d902a7c-goog