From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 70D3FC433EF for ; Tue, 5 Apr 2022 13:15:35 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4CF7F83BC7; Tue, 5 Apr 2022 15:14:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="dgB08qXw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 13C9C83B20; Tue, 5 Apr 2022 15:14:31 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C7BC883B38 for ; Tue, 5 Apr 2022 15:14:18 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 993176187D; Tue, 5 Apr 2022 13:14:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DAB8CC385A1; Tue, 5 Apr 2022 13:14:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649164457; bh=7GeXk/h2vpNwDWCVR06ie7bIHVPDN+RPZij3IMuyiNE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dgB08qXwyom4Dh8rys/xF94uSYaWCIveJN/YFnhyBSNVOlhJ1XHmoGS2VBTX4cwez bUKaL6X8oeyqoRqnXrEHVM/kO3EzTsq+iy8V36WylHdxEakDsKTBlgwo2xbfQ00kcl USsBXLwb4w65/bVEnChEZCjWVEdYjhgp+xHSgSZESdGlXgf/6MhcS0wonCsctVw4hW rwF1be7/ijGSPpiq3z7cY5CepzZUCBuSTS+Qd4x/C8wUzCXpfO1IvjdMXEtlsCSGCk 7i5tvwBS+3dGor27BSQsGhlvDmH9Y/fPgsLprvHLBnA4rw71PshJYkG9qH37sT5CFE 0uJYi4l8jlwNQ== Received: by pali.im (Postfix) id 8F15A7B2; Tue, 5 Apr 2022 15:14:16 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Priyanka Jain , Qiang Zhao , Shengzhou Liu , Alexander Graf , Bin Meng , Wolfgang Denk , Sinan Akman Cc: u-boot@lists.denx.de Subject: [PATCH 6/8] powerpc: mpc85xx: Define linker sections in ascending order Date: Tue, 5 Apr 2022 15:12:35 +0200 Message-Id: <20220405131237.405-7-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220405131237.405-1-pali@kernel.org> References: <20220405131237.405-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár --- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 20 +++++++++++--------- arch/powerpc/cpu/mpc85xx/u-boot.lds | 15 ++++++++------- 2 files changed, 19 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 27a5fe6306a3..1b4d1e05a4a3 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -18,6 +18,13 @@ PHDRS #endif SECTIONS { +/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg IMAGE_TEXT_BASE - 0x1000 : + { + KEEP(*(.bootpg)) + } :text = 0xffff +#endif . = IMAGE_TEXT_BASE; .text : { *(.text*) @@ -67,18 +74,13 @@ SECTIONS __bss_end = .; #endif -/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ -#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC - .bootpg ADDR(.text) - 0x1000 : - { - KEEP(*(.bootpg)) - } :text = 0xffff -#else +/* For nor and nand is needed the SPL with section .resetvec */ +#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ #ifndef BOOT_PAGE_OFFSET #define BOOT_PAGE_OFFSET 0x1000 #endif - .bootpg ADDR(.text) + BOOT_PAGE_OFFSET : + .bootpg IMAGE_TEXT_BASE + BOOT_PAGE_OFFSET : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) } @@ -90,7 +92,7 @@ SECTIONS #else #error unknown NAND controller #endif - .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { + .resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : { KEEP(*(.resetvec)) } = 0xffff #endif diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 9d0f0d58d804..e1bbee43bcb4 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -23,6 +23,13 @@ PHDRS SECTIONS { /* Read-only sections, merged into text segment: */ +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg CONFIG_SYS_TEXT_BASE - 0x1000 : + { + KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) + } :text = 0xffff + . = CONFIG_SYS_TEXT_BASE; +#endif .text : { *(.text*) @@ -77,13 +84,7 @@ SECTIONS __init_end = .; _end = .; -#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC - .bootpg ADDR(.text) - 0x1000 : - { - KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) - } :text = 0xffff - . = _end; -#else +#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC .bootpg RESET_VECTOR_ADDRESS - 0xffc : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) -- 2.20.1