From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C93FC433EF for ; Thu, 7 Apr 2022 07:13:45 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 51DB883DA9; Thu, 7 Apr 2022 09:13:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1649315584; bh=Yv6E6JD26iSxiutEx3CnZhRleZSvMEAv2oRPBLcwWcU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=EVrqlNZVVWsK2TdOzrnMf/fPWv66EgMJYcTsocRybHVRKNA1MC1DHsnEZD8IR30Be Ek+7qLmRTKc17Pvvs1WYQ62FgQEa8Dpneq3hHcjmKdTO1yOqt0oNB9ObELYOuA8wzJ UQavrLEGW16NeuC5Iwk3ctGarn/WlKUOLksPSh97f6G300OuIsfsJ9PXNxsweUGW+J DCTicWWON8awDcNz/TGIszGbvrywUnfEpZ7dLKrkYkH01bGkPMn/p3eC0eYniSc36K ZgdcoA1Ga5b2JAytdalAPbxmY4vs7VqTHl70mJkzIwttKocPToiwuPKThZASQsncD9 4iTZ3JaT7xv0g== Received: by phobos.denx.de (Postfix, from userid 109) id EE5C683110; Thu, 7 Apr 2022 09:12:29 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [80.241.59.207]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 598E883BBE for ; Thu, 7 Apr 2022 09:12:04 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (smtp2.mailbox.org [IPv6:2001:67c:2050:105:465:1:2:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4KYsyD1kJCz9sX7; Thu, 7 Apr 2022 09:12:04 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: daniel.schwierzeck@gmail.com, awilliams@marvell.com, cchavva@marvell.com Subject: [PATCH v2 16/52] mips: octeon: Add cvmx-helper-npi.c Date: Thu, 7 Apr 2022 09:11:18 +0200 Message-Id: <20220407071154.51997-17-sr@denx.de> In-Reply-To: <20220407071154.51997-1-sr@denx.de> References: <20220407071154.51997-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Aaron Williams Import cvmx-helper-npi.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams Signed-off-by: Stefan Roese --- arch/mips/mach-octeon/cvmx-helper-npi.c | 137 ++++++++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 arch/mips/mach-octeon/cvmx-helper-npi.c diff --git a/arch/mips/mach-octeon/cvmx-helper-npi.c b/arch/mips/mach-octeon/cvmx-helper-npi.c new file mode 100644 index 000000000000..92ee1a80215a --- /dev/null +++ b/arch/mips/mach-octeon/cvmx-helper-npi.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018-2022 Marvell International Ltd. + * + * Functions for NPI initialization, configuration, + * and monitoring. + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +static int cvmx_npi_num_pipes = -1; + +/** + * @INTERNAL + * Probe a NPI interface and determine the number of ports + * connected to it. The NPI interface should still be down + * after this call. + * + * @param interface to probe + * + * @return Number of ports on the interface. Zero to disable. + */ +int __cvmx_helper_npi_probe(int interface) +{ + if (OCTEON_IS_MODEL(OCTEON_CN68XX)) + return 32; + else if (OCTEON_IS_MODEL(OCTEON_CN73XX)) + return 128; + else if (OCTEON_IS_MODEL(OCTEON_CN78XX)) + return 64; + + return 0; +} + +/** + * @INTERNAL + * Bringup and enable a NPI interface. After this call packet + * I/O should be fully functional. This is called with IPD + * enabled but PKO disabled. + * + * @param xiface Interface to bring up + * + * @return Zero on success, negative on failure + */ +int __cvmx_helper_npi_enable(int xiface) +{ + struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface); + int interface = xi.interface; + int port; + int num_ports = cvmx_helper_ports_on_interface(interface); + + /* + * On CN50XX, CN52XX, and CN56XX we need to disable length + * checking so packet < 64 bytes and jumbo frames don't get + * errors. + */ + for (port = 0; port < num_ports; port++) { + union cvmx_pip_prt_cfgx port_cfg; + int ipd_port = + (octeon_has_feature(OCTEON_FEATURE_PKND)) ? + cvmx_helper_get_pknd(interface, port) : + cvmx_helper_get_ipd_port(interface, port); + if (octeon_has_feature(OCTEON_FEATURE_PKI)) { + unsigned int node = cvmx_get_node_num(); + + cvmx_pki_endis_l2_errs(node, ipd_port, 0, 0, 0); + + } else { + port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(ipd_port)); + port_cfg.s.lenerr_en = 0; + port_cfg.s.maxerr_en = 0; + port_cfg.s.minerr_en = 0; + csr_wr(CVMX_PIP_PRT_CFGX(ipd_port), port_cfg.u64); + } + if (OCTEON_IS_MODEL(OCTEON_CN68XX)) { + /* Set up pknd and bpid */ + union cvmx_sli_portx_pkind config; + + config.u64 = csr_rd(CVMX_PEXP_SLI_PORTX_PKIND(port)); + config.s.bpkind = cvmx_helper_get_bpid(interface, port); + config.s.pkind = cvmx_helper_get_pknd(interface, port); + csr_wr(CVMX_PEXP_SLI_PORTX_PKIND(port), config.u64); + } + } + + if (OCTEON_IS_MODEL(OCTEON_CN68XX)) { + /* + * Set up pko pipes. + */ + union cvmx_sli_tx_pipe config; + + config.u64 = csr_rd(CVMX_PEXP_SLI_TX_PIPE); + config.s.base = __cvmx_pko_get_pipe(interface, 0); + config.s.nump = + cvmx_npi_num_pipes < 0 ? num_ports : cvmx_npi_num_pipes; + csr_wr(CVMX_PEXP_SLI_TX_PIPE, config.u64); + } + + /* Enables are controlled by the remote host, so nothing to do here */ + return 0; +} -- 2.35.1