[PATCH v5 02/13] rockchip: spl: change call condition rockchip_stimer_init()

[Johan Jonker <jbx6244@gmail.com>]

The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---

Changed V5:
  reword
  remove IS_ENABLED
  remove include kconfig.h

Changed V3:
  use CONFIG_ROCKCHIP_STIMER

Changed V2:
  use IS_ENABLED
  add include kconfig.h
  move define location so that rockchip_stimer_init() is always
  visible to the compiler
---
 arch/arm/mach-rockchip/spl.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 7a8db632b8..9bdc47bf7c 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -71,7 +71,6 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
 	return MMCSD_MODE_RAW;
 }
 
-#if !defined(CONFIG_ROCKCHIP_RK3188)
 #define TIMER_LOAD_COUNT_L	0x00
 #define TIMER_LOAD_COUNT_H	0x04
 #define TIMER_CONTROL_REG	0x10
@@ -81,6 +80,7 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
+#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
 	/* If Timer already enabled, don't re-init it */
 	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
 
@@ -95,8 +95,8 @@ __weak void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
 	writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
 	       TIMER_CONTROL_REG);
-}
 #endif
+}
 
 __weak int board_early_init_f(void)
 {
@@ -133,9 +133,9 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 	arch_cpu_init();
-#if !defined(CONFIG_ROCKCHIP_RK3188)
+
 	rockchip_stimer_init();
-#endif
+
 #ifdef CONFIG_SYS_ARCH_TIMER
 	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
 	timer_init();
-- 
2.20.1