From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1CCAC433F5 for ; Tue, 12 Apr 2022 22:42:05 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D5A8783EE5; Wed, 13 Apr 2022 00:42:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1649803324; bh=MdYZ2wBkpwsKg+DDlJw+NIAc1a15zPHlPRGlItIGrpM=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=JqwjRCu8jEVTMvrxPp2GFmsW76YpI4Jnr8pmLrWnxiwMh8J0UfoIFB9nK6EI26ciR I3z7Yr4ydjKsLA79Q8pkq4MbljEcUgxinrdICa/tGexKyeXhamRWUAffnPu7d3oxi0 dbL4w4ZXuHBW9Tl6NrVJeUeMYYiAhaNBL5Qu/alchfFSEKwk+mbuu97mi+C9me02hk HjAQjYWNOD2/UvfV2PoXTWsSRSGtI/vmfS0nWSS6mGnR+8PxWsg4rMR/iP/i0L8lsM os2OzTUE4mvnpLAtuxkXqMS1oBEMK4vNr/VFND9ZmVAwaNw0+2WxpFy8MP0btm5uO6 OzkzY7mlUih4A== Received: from tr.lan (ip-86-49-12-201.net.upcbroadband.cz [86.49.12.201]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 4E87183EE4; Wed, 13 Apr 2022 00:42:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1649803322; bh=MdYZ2wBkpwsKg+DDlJw+NIAc1a15zPHlPRGlItIGrpM=; h=From:To:Cc:Subject:Date:From; b=HFgwFR5GRr3GqKeS2LGxtZD9TJulULUCU8T+2dTtriPAS7uhFH9fZk6i2URbWZgmh RBXyVNNufhlgozCAiBY6UUG1ztXvg3GoOZdACC8UMvyTLxczqdXgPaBWCHsutIAnqo jIF0CKVL5zSoDYHeuG4yB9SS240PzNmXm9yYnTcaEpOn5c3R3AK2pQT9r7+BNQyDPd sSmxNe7j+qF+oQWY3QSflc25EnP42czOE/4bK/x/W+6Eg28wTHb+VLoYQW8HyxHhOi BvVxdWzyfrjRcMJ3nwtsIDSH2qz1jLXsryiYGQp+VmtyzJFnHO8VK3Zur7zVt73Gl/ sbT65Te5PVYjQ== From: Marek Vasut To: u-boot@lists.denx.de, sbabic@denx.de Cc: Marek Vasut , Fabio Estevam , Peng Fan Subject: [PATCH v2] ARM: imx: Enable instruction cache early on on i.MX8M Date: Wed, 13 Apr 2022 00:41:52 +0200 Message-Id: <20220412224152.194959-1-marex@denx.de> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Enable instruction cache early on to speed up the boot process on i.MX8M. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic --- V2: Protect the icache_enable with !CONFIG_IS_ENABLED(SYS_ICACHE_OFF), the symbol might be undefined in case CONFIG_(SPL_)SYS_ICACHE_OFF is set --- arch/arm/mach-imx/imx8m/soc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index bb94ef51492..8171631db10 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -550,6 +550,11 @@ EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock); int arch_cpu_init(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) + icache_enable(); +#endif + /* * ROM might disable clock for SCTR, * enable the clock before timer_init. -- 2.35.1