From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91650C433EF for ; Wed, 27 Apr 2022 10:44:52 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 468CD83EDF; Wed, 27 Apr 2022 12:43:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="jE5IGoOm"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 12F5E83EAF; Wed, 27 Apr 2022 12:42:57 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A254583E58 for ; Wed, 27 Apr 2022 12:42:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=kabel@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 69BF161D41; Wed, 27 Apr 2022 10:42:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1AB92C385AA; Wed, 27 Apr 2022 10:42:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651056159; bh=VWlkS10G9Ghi6N1jFDMJasyax5/4XHkU5zl8KlynGOE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jE5IGoOmHzoW4Z9bpks8gcCJgO5uz27GWpia9gmmxaBYRQqb6I2v9JiMuBNjrfFus Dqw5OXoA0z8xphjbUAxwQFfaUTxIfhKcQM5ihdgiKa52/aVunIjjAvnBjfKyFsQvMd wClpziwbDRU0sb1a+Sr4VlP2zWvAGXksedgGty84o4MG/eotDnvs2JJetYXTTJEh56 nQZcECLCUsLXWFM+4AdKoTjOMP8o3BHKL0WYDdX7gjahU+iN6IiY+LbwwYDcGucmtF UqiFISoJ/GGRjHxHIXrgrAwfec5cLaF3ymf4HdlSRu9CyboiODzgXrrBx50VZQya7+ xGTvpEIXbjOgg== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Stefan Roese Cc: Robert Marko , =?UTF-8?q?Pali=20Roh=C3=A1r?= , U-Boot-Denx , Ramon Fried , Joe Hershberger , =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH u-boot-marvell 14/19] net: mvneta: Rename CONFIG_NR_CPUS to MVNETA_NR_CPUS Date: Wed, 27 Apr 2022 12:41:57 +0200 Message-Id: <20220427104202.1205-15-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220427104202.1205-1-kabel@kernel.org> References: <20220427104202.1205-1-kabel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Marek Behún The CONFIG_* macros are reserved for Kconfig. This was probably done when this driver was being imported from Linux. Rename the macro. Signed-off-by: Marek Behún --- drivers/net/mvneta.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index 0ec9d2957c..519e06ff01 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR; -#define CONFIG_NR_CPUS 1 +#define MVNETA_NR_CPUS 1 #define ETH_HLEN 14 /* Total octets in header */ /* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */ @@ -770,7 +770,7 @@ static void mvneta_defaults_set(struct mvneta_port *pp) /* Set CPU queue access map - all CPUs have access to all RX * queues and to all TX queues */ - for (cpu = 0; cpu < CONFIG_NR_CPUS; cpu++) + for (cpu = 0; cpu < MVNETA_NR_CPUS; cpu++) mvreg_write(pp, MVNETA_CPU_MAP(cpu), (MVNETA_CPU_RXQ_ACCESS_ALL_MASK | MVNETA_CPU_TXQ_ACCESS_ALL_MASK)); -- 2.35.1