[PATCH v2 3/4] board: freescale: p1_p2_rdb_pc: Avoid usage of CPLD's system reset register

Pali Rohár
2022-08-01T13:32:31Z

CPLD's system reset register is buggy and requires workaround in U-Boot.
So use this kind of board reset only when there is no other reset option.

Introduce a new board_reset_last() callback which is last-stage
board-specific reset and implement CPLD's system reset in this new
board_reset_last() callback instead of board_reset() callback.

Fixes: 20fb58fc5a1c ("board: freescale: p1_p2_rdb_pc: Implement board_reset()")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/powerpc/cpu/mpc85xx/cpu.c | 4 ++++
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 226a26ba320a..c63c17286811 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -44,6 +44,7 @@ __board_reset(void)
/* Do nothing */
}
void board_reset(void) __attribute__((weak, alias("__board_reset")));
+void board_reset_last(void) __attribute__((weak, alias("__board_reset")));

int checkcpu (void)
{
@@ -328,6 +329,9 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
/* Next try asserting HRESET_REQ */
out_be32(&gur->rstcr, 0x2);
udelay(100);
+
+ /* Attempt last-stage board-specific reset */
+ board_reset_last();
#endif

return 1;
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 16224752adb1..4bcb05bed9b8 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -83,7 +83,7 @@ struct cpld_data {
#define CPLD_FXS_LED 0x0F
#define CPLD_SYS_RST 0x00

-void board_reset(void)
+void board_reset_last(void)
{
struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
out_8(&cpld_data->system_rst, 1);
--
2.20.1