From: "Pali Rohár" <pali@kernel.org>
To: Wolfgang Denk <wd@denx.de>
Cc: u-boot@lists.denx.de
Subject: [PATCH] powerpc: fsl_law: Add definition for first PCIe target interface
Date: Sun, 1 May 2022 17:45:58 +0200 [thread overview]
Message-ID: <20220501154558.19060-1-pali@kernel.org> (raw)
Header file asm/fsl_law.h already provides correct definition for second
and third PCIe controller (LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3). But
is missing definition for the first PCIe controller (LAW_TRGT_IF_PCIE_1).
Note that existing definition for LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3
are slightly complicated, but are really correct for P2020 platform.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/powerpc/include/asm/fsl_law.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index 39fbc04e4744..9e2f2d5370d9 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -78,6 +78,7 @@ enum law_trgt_if {
enum law_trgt_if {
LAW_TRGT_IF_PCI = 0x00,
LAW_TRGT_IF_PCI_2 = 0x01,
+ LAW_TRGT_IF_PCIE_1 = 0x02,
#if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132)
LAW_TRGT_IF_OCN_DSP = 0x03,
#else
--
2.20.1
reply other threads:[~2022-05-01 15:46 UTC|newest]
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