[PULL] u-boot-riscv/master

Leo Liang
2021-05-07T01:41:36Z

On Fri, May 07, 2021 at 09:09:43AM +0800, Tom Rini wrote:
> On Fri, May 07, 2021 at 09:06:33AM +0800, Leo Liang wrote:
>
> > Hi Tom,
> >
> > CI result: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7400
> >
> > The following changes since commit 8ddaf943589756442bba21e5be645cd47526d82b:
> >
> > Merge tag 'dm-pull-29apr21' of https://source.denx.de/u-boot/custodians/u-boot-dm (2021-04-29 21:03:38 -0400)
> >
> > are available in the Git repository at:
> >
> > https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> >
> > for you to fetch changes up to 91e4b7516d84cefab7324765b3c8d6a909185ce2:
> >
> > cmd/exception: support ebreak exception on RISC-V (2021-05-05 16:13:12 +0800)
> >
> > ----------------------------------------------------------------
> > Dylan Jhong (1):
> > atcspi200: Add timeout mechanism in spi_xfer()
> >
> > Green Wan (2):
> > riscv: cpu: Add callback to init each core
> > riscv: cpu: fu740: clear feature disable CSR
> >
> > Heinrich Schuchardt (1):
> > cmd/exception: support ebreak exception on RISC-V
> >
> > arch/riscv/cpu/cpu.c | 11 +++++++++++
> > arch/riscv/cpu/fu540/spl.c | 15 +++++++++++++++
> > arch/riscv/cpu/start.S | 4 ++++
> > cmd/riscv/exception.c | 10 ++++++++++
> > doc/usage/exception.rst | 3 +++
> > drivers/spi/atcspi200_spi.c | 10 ++++++++--
> > 6 files changed, 51 insertions(+), 2 deletions(-)
>
> Please note that currently
> https://patchwork.ozlabs.org/project/uboot/list/?series=&submitter=&state=&q=&archive=&delegate=20174
> shows 55 patches. Most of them have been posted long enough that I
> would expect them to be applied if there's no further feedback. Can you
> please take a look? Thanks!
>

No problem, sorry for the delay!

Two quick questions.

Some of the patches delegated to Andes do not own a RISC-V tag but rather clk or driver etc.
Do you mind if we pull them through RISC-V tree?

And for these patches,
do you prefer them pulled into this release or for-next branch?

Best regards,
Leo