Re: [PATCH 2/3] Add a couple of missing clocks for MMCSD.

[Xavier Drudis Ferran <xdrudis@tinet.cat>]

This helped boot a Radxa Rock Pi 4B from SD card. With U-boot master
at commit 4fe629d2e8bb ("Merge
https://source.denx.de/u-boot/custodians/u-boot-riscv") from
2022-05-27T08:50:42-0400 and the SPI clock shorted to GND to make the
bootrom boot from SD card, SPL stopped at the "Trying to boot from
MMC1" message.

Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
---
 drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 7d31a9f22a..fc3a5d4e9b 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1184,6 +1184,12 @@ static int rk3399_clk_enable(struct clk *clk)
 	case SCLK_PCIEPHY_REF:
 		rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
 		break;
+	case SCLK_SDMMC:
+		rk_clrreg(&priv->cru->clksel_con[6], BIT(1));
+		break;
+	case HCLK_SDMMC:
+		rk_clrreg(&priv->cru->clksel_con[33], BIT(8));
+		break;
 	default:
 		debug("%s: unsupported clk %ld\n", __func__, clk->id);
 		return -ENOENT;
@@ -1278,6 +1284,12 @@ static int rk3399_clk_disable(struct clk *clk)
 	case SCLK_PCIEPHY_REF:
 		rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
 		break;
+	case SCLK_SDMMC:
+		rk_setreg(&priv->cru->clksel_con[6], BIT(1));
+		break;
+	case HCLK_SDMMC:
+		rk_setreg(&priv->cru->clksel_con[33], BIT(8));
+		break;
 	default:
 		debug("%s: unsupported clk %ld\n", __func__, clk->id);
 		return -ENOENT;
-- 
2.20.1