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[77.21.162.21]) by smtp.gmail.com with ESMTPSA id m6-20020a056402430600b004319b12371asm5039462edc.47.2022.06.09.13.50.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jun 2022 13:50:04 -0700 (PDT) From: Heiko Thiery To: u-boot@lists.denx.de Cc: Ying-Chun Liu , Peng Fan , Fabio Estevam , Heiko Thiery , Marek Vasut , Marcel Ziswiler , Tim Harvey , Sean Anderson , =?UTF-8?q?Thomas=20Sch=C3=A4fer?= , Stefano Babic Subject: [PATCH v2 2/2] ARM: imx: imx8mn-evk: use one common u-boot.dtsi for the evk boards Date: Thu, 9 Jun 2022 22:49:28 +0200 Message-Id: <20220609204926.26580-2-heiko.thiery@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220609204926.26580-1-heiko.thiery@gmail.com> References: <20220609204926.26580-1-heiko.thiery@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean To have only one place to describe the binman images us the imx8mn-u-boot.dtsi. To have support for different DDR firmwares this nodes are included dependent on the used DDR config option. Signed-off-by: Heiko Thiery Reviewed-by: Fabio Estevam --- v2: sync with current master and fix merge conflict arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 125 +----------------- arch/arm/dts/imx8mn-evk-u-boot.dtsi | 120 +---------------- arch/arm/dts/imx8mn-u-boot.dtsi | 156 +++++++++++++++++++++++ 3 files changed, 159 insertions(+), 242 deletions(-) create mode 100644 arch/arm/dts/imx8mn-u-boot.dtsi diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4d0ecb07d4..3d0e817313 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -3,11 +3,9 @@ * Copyright 2019, 2021 NXP */ -/ { - binman: binman { - multiple-images; - }; +#include "imx8mn-u-boot.dtsi" +/ { wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; @@ -143,122 +141,3 @@ &wdog1 { u-boot,dm-spl; }; - -&binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - }; - - blob_1: blob-ext@1 { - filename = "ddr4_imem_1d_201810.bin"; - size = <0x8000>; - }; - - blob_2: blob-ext@2 { - filename = "ddr4_dmem_1d_201810.bin"; - size = <0x4000>; - }; - - blob_3: blob-ext@3 { - filename = "ddr4_imem_2d_201810.bin"; - size = <0x8000>; - }; - - blob_4: blob-ext@4 { - filename = "ddr4_dmem_2d_201810.bin"; - size = <0x4000>; - }; - }; - - - spl { - filename = "spl.bin"; - - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; - - blob { - filename = "u-boot-spl-ddr.bin"; - }; - }; - }; - - itb { - filename = "u-boot.itb"; - - fit { - description = "Configuration to load ATF before U-Boot"; - #address-cells = <1>; - fit,external-offset = ; - - images { - uboot { - description = "U-Boot (64-bit)"; - type = "standalone"; - arch = "arm64"; - compression = "none"; - load = ; - - uboot_blob: blob-ext { - filename = "u-boot-nodtb.bin"; - }; - }; - - atf { - description = "ARM Trusted Firmware"; - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <0x960000>; - entry = <0x960000>; - - atf_blob: blob-ext { - filename = "bl31.bin"; - }; - }; - - fdt { - description = "NAME"; - type = "flat_dt"; - compression = "none"; - - uboot_fdt_blob: blob-ext { - filename = "u-boot.dtb"; - }; - }; - }; - - configurations { - default = "conf"; - - conf { - description = "NAME"; - firmware = "uboot"; - loadables = "atf"; - fdt = "fdt"; - }; - }; - }; - }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - - spl: blob-ext@1 { - offset = <0x0>; - filename = "spl.bin"; - }; - - uboot: blob-ext@2 { - offset = <0x58000>; - filename = "u-boot.itb"; - }; - }; -}; diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi index d1427941eb..339c3dd681 100644 --- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include "imx8mn-u-boot.dtsi" #include "imx8mn-ddr4-evk-u-boot.dtsi" &i2c1 { @@ -24,122 +25,3 @@ &pinctrl_pmic { u-boot,dm-spl; }; - -&binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - }; - - blob_1: blob-ext@1 { - filename = "lpddr4_pmu_train_1d_imem.bin"; - size = <0x8000>; - }; - - blob_2: blob-ext@2 { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - size = <0x4000>; - }; - - blob_3: blob-ext@3 { - filename = "lpddr4_pmu_train_2d_imem.bin"; - size = <0x8000>; - }; - - blob_4: blob-ext@4 { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - size = <0x4000>; - }; - }; - - - spl { - filename = "spl.bin"; - - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; - - blob { - filename = "u-boot-spl-ddr.bin"; - }; - }; - }; - - itb { - filename = "u-boot.itb"; - - fit { - description = "Configuration to load ATF before U-Boot"; - #address-cells = <1>; - fit,external-offset = ; - - images { - uboot { - description = "U-Boot (64-bit)"; - type = "standalone"; - arch = "arm64"; - compression = "none"; - load = ; - - uboot_blob: blob-ext { - filename = "u-boot-nodtb.bin"; - }; - }; - - atf { - description = "ARM Trusted Firmware"; - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <0x960000>; - entry = <0x960000>; - - atf_blob: blob-ext { - filename = "bl31.bin"; - }; - }; - - fdt { - description = "NAME"; - type = "flat_dt"; - compression = "none"; - - uboot_fdt_blob: blob-ext { - filename = "u-boot.dtb"; - }; - }; - }; - - configurations { - default = "conf"; - - conf { - description = "NAME"; - firmware = "uboot"; - loadables = "atf"; - fdt = "fdt"; - }; - }; - }; - }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - - spl: blob-ext@1 { - offset = <0x0>; - filename = "spl.bin"; - }; - - uboot: blob-ext@2 { - offset = <0x58000>; - filename = "u-boot.itb"; - }; - }; -}; diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi new file mode 100644 index 0000000000..7b591085a0 --- /dev/null +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + u_boot_spl_ddr: u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + fit,external-offset = ; + + images { + uboot { + description = "U-Boot (64-bit)"; + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = ; + + uboot_blob: blob-ext { + filename = "u-boot-nodtb.bin"; + }; + }; + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x960000>; + entry = <0x960000>; + + atf_blob: blob-ext { + filename = "bl31.bin"; + }; + }; + + fdt { + description = "NAME"; + type = "flat_dt"; + compression = "none"; + + uboot_fdt_blob: blob-ext { + filename = "u-boot.dtb"; + }; + }; + }; + + configurations { + default = "conf"; + + conf { + description = "NAME"; + firmware = "uboot"; + loadables = "atf"; + fdt = "fdt"; + }; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl: blob-ext@1 { + offset = <0x0>; + filename = "spl.bin"; + }; + + uboot: blob-ext@2 { + offset = <0x58000>; + filename = "u-boot.itb"; + }; + }; +}; + +#ifdef CONFIG_IMX8M_DDR4 +&u_boot_spl_ddr { + blob_1: blob-ext@1 { + filename = "ddr4_imem_1d_201810.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "ddr4_dmem_1d_201810.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "ddr4_imem_2d_201810.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "ddr4_dmem_2d_201810.bin"; + size = <0x4000>; + }; +}; +#elif CONFIG_IMX8M_LPDDR4 +&u_boot_spl_ddr { + blob_1: blob-ext@1 { + filename = "lpddr4_pmu_train_1d_imem.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "lpddr4_pmu_train_2d_imem.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + size = <0x4000>; + }; +}; +#else + #error "no valid ddr config selected" +#endif -- 2.20.1