From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA437C43334 for ; Wed, 15 Jun 2022 17:06:17 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2138A844DE; Wed, 15 Jun 2022 19:06:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=tinet.cat Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id CA80F844DE; Wed, 15 Jun 2022 19:06:12 +0200 (CEST) Received: from mx1.tinet.cat (mx1.dipta.cat [195.76.233.59]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 20F80844D5 for ; Wed, 15 Jun 2022 19:06:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=tinet.cat Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=xdrudis@tinet.cat X-ASG-Debug-ID: 1655312766-12aaf26763a8df60001-4l7tJC Received: from smtp01.tinet.cat (smtp01.tinet.cat [195.77.216.131]) by mx1.tinet.cat with ESMTP id 5MUNE4Xb8UGrTrDc; Wed, 15 Jun 2022 19:06:06 +0200 (CEST) X-Barracuda-Envelope-From: xdrudis@tinet.cat X-Barracuda-Effective-Source-IP: smtp01.tinet.cat[195.77.216.131] X-Barracuda-Apparent-Source-IP: 195.77.216.131 Received: from begut (50.red-79-152-182.dynamicip.rima-tde.net [79.152.182.50]) by smtp01.tinet.cat (Postfix) with ESMTPSA id B1205605D0AB; Wed, 15 Jun 2022 19:06:06 +0200 (CEST) Date: Wed, 15 Jun 2022 19:05:55 +0200 From: Xavier Drudis Ferran To: Jerome Forissier Cc: u-boot@lists.denx.de, Deepak Das , Jagan Teki , Simon Glass , Philipp Tomsich , Kever Yang , Alexandru Gagniuc , Jaehoon Chung , Heiko Schocher , Tero Kristo , Nishanth Menon , Lokesh Vutla , Michal Simek Subject: Re: [PATCH 2/2] rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed Message-ID: <20220615170555.GA1806@begut> X-ASG-Orig-Subj: Re: [PATCH 2/2] rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed References: <20220609152414.1518919-2-jerome.forissier@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Barracuda-Connect: smtp01.tinet.cat[195.77.216.131] X-Barracuda-Start-Time: 1655312766 X-Barracuda-URL: https://webmail.tinet.cat:443/cgi-mod/mark.cgi X-Barracuda-Scan-Msg-Size: 4039 X-Barracuda-BRTS-Status: 1 X-Barracuda-Bayes: INNOCENT GLOBAL 0.5002 1.0000 0.7500 X-Barracuda-Spam-Score: 0.75 X-Barracuda-Spam-Status: No, SCORE=0.75 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=6.0 KILL_LEVEL=8.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.98738 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean El Tue, Jun 14, 2022 at 11:16:42AM -0700, Jerome Forissier deia: > Oops, that should rather be: > > +#if (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE == 0) > I tested with this change, not that my opinion counts much, but anyway: Reviewed-by: Xavier Drudis Ferran Tested-by: Xavier Drudis Ferran This changes reduce some 0.2 s the boot time of my Rock Pi 4B. Before this series, just with u-boot/master from today c18e5fb055 dtoc: Update test_src_scan.py for new tegra compatibles plus the patches I sent to this list (I can't boot from MMC without them) https://lists.denx.de/pipermail/u-boot/2022-June/485497.html and bootstage configured, I get : Timer summary in microseconds (10 records): Mark Elapsed Stage 1,903,436 1,903,436 board_init_f 1,903,436 0 board_init_f 2,900,331 996,895 board_init_r 4,091,657 1,191,326 id=64 4,930,650 838,993 id=65 4,930,827 177 main_loop 7,946,715 3,015,888 bootm_start 9,010,637 1,063,922 id=15 9,010,639 2 start_kernel Accumulated time: 22,700 dm_r 479,397 dm_f With that plus 1/2 in this series and CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE=0x3000 I get something similar (slightly slower because of >=3 correct reads instead of 1 overwriting read per image): Timer summary in microseconds (10 records): Mark Elapsed Stage 1,979,414 1,979,414 board_init_f 1,979,414 0 board_init_f 2,976,429 997,015 board_init_r 4,166,623 1,190,194 id=64 5,005,623 839,000 id=65 5,005,800 177 main_loop 8,020,791 3,014,991 bootm_start 9,084,116 1,063,325 id=15 9,084,118 2 start_kernel Accumulated time: 22,699 dm_r 479,480 dm_f With that plus this 2/2 it's faster (while safer) than initially. Timer summary in microseconds (10 records): Mark Elapsed Stage 1,709,384 1,709,384 board_init_f 1,709,384 0 board_init_f 2,706,192 996,808 board_init_r 3,895,269 1,189,077 id=64 4,733,786 838,517 id=65 4,733,963 177 main_loop 7,751,063 3,017,100 bootm_start 8,814,449 1,063,386 id=15 8,814,451 2 start_kernel Accumulated time: 22,703 dm_r 479,520 dm_f With this change your 2/2 patch becomes --- From: Jerome Forissier Date: Thu, 9 Jun 2022 17:23:22 +0200 Subject: [PATCH] rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed Commit 5c606ca35c42 ("rockchip: rk3399: enable spl-fifo-mode for sdmmc") mentions that the RK3399 SoC can't do DMA between SDMMC and SRAM. According to the TRM "7.3.2 Embedded SRAM access path" [1], only the 8KB SRAM at 0xff3b0000 (INTMEM1) is in this situation. The 192KB SRAM can be accessed by both DMA controllers. Assuming the only use case for writing from MMC to INTMEM1 is loading a FIT image, and with the introduction of a temporary buffer for that purpose (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE, which is required anyways to ensure the destination boundaries are enforced), then spl-fifo-mode is not needed anymore and DMA can be enabled safely. Link: [1] https://www.rockchip.fr/Rockchip%20RK3399%20TRM%20V1.4%20Part1.pdf CC: Deepak Das Signed-off-by: Jerome Forissier --- arch/arm/dts/rk3399-u-boot.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 716b9a433a..e0bb230022 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -124,9 +124,10 @@ &sdmmc { u-boot,dm-pre-reloc; +#if (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE == 0) /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ u-boot,spl-fifo-mode; +#endif }; &spi1 { -- 2.20.1