* [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation
@ 2022-06-21 20:05 Michael Trimarchi
2022-06-29 6:49 ` Michael Nazzareno Trimarchi
2022-06-29 13:47 ` Tom Rini
0 siblings, 2 replies; 4+ messages in thread
From: Michael Trimarchi @ 2022-06-21 20:05 UTC (permalink / raw)
To: u-boot, Ye Li, Han Xu; +Cc: Andrea Scian, Stefano Babic
From: Andrea Scian <andrea.scian@dave.eu>
mxs_nand_command() implementation assume that it's working with a
LP NAND, which is a common case nowadays and thus uses two bytes
for column address.
However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
expects only one byte of column address, even for LP NANDs.
This leads to ONFI detection problem with some NAND manufacturer (like
Winbond) but not with others (like Samsung and Spansion)
We fix this with a simple workaround to avoid the 2nd byte column address
for those two commands.
Also align the code with nand_base to support 16 bit devices.
Tested on an iMX6SX device with:
* Winbond W29N04GVSIAA
* Spansion S34ML04G100TF100
* Samsung K9F4G08U00
Tested on imx8mn device with:
* Windbond W29N04GV
Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
CC: Stefano Babic <sbabic@denx.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
drivers/mtd/nand/raw/mxs_nand_spl.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 2bfb181007..3daacbb330 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -29,8 +29,20 @@ static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
/* Serially input address */
if (column != -1) {
+ /* Adjust columns for 16 bit buswidth */
+ if (chip->options & NAND_BUSWIDTH_16 &&
+ !nand_opcode_8bits(command))
+ column >>= 1;
chip->cmd_ctrl(mtd, column, NAND_ALE);
- chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
+
+ /*
+ * Assume LP NAND here, so use two bytes column address
+ * but not for CMD_READID and CMD_PARAM, which require
+ * only one byte column address
+ */
+ if (command != NAND_CMD_READID &&
+ command != NAND_CMD_PARAM)
+ chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
}
if (page_addr != -1) {
chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation
2022-06-21 20:05 [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation Michael Trimarchi
@ 2022-06-29 6:49 ` Michael Nazzareno Trimarchi
2022-06-29 12:28 ` Fabio Estevam
2022-06-29 13:47 ` Tom Rini
1 sibling, 1 reply; 4+ messages in thread
From: Michael Nazzareno Trimarchi @ 2022-06-29 6:49 UTC (permalink / raw)
To: u-boot, Ye Li, Han Xu, Tom Rini
Cc: Andrea Scian, Stefano Babic, Fabio Estevam
Hi Tom
On Tue, Jun 21, 2022 at 10:05 PM Michael Trimarchi
<michael@amarulasolutions.com> wrote:
>
> From: Andrea Scian <andrea.scian@dave.eu>
>
> mxs_nand_command() implementation assume that it's working with a
> LP NAND, which is a common case nowadays and thus uses two bytes
> for column address.
>
> However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
> expects only one byte of column address, even for LP NANDs.
> This leads to ONFI detection problem with some NAND manufacturer (like
> Winbond) but not with others (like Samsung and Spansion)
>
> We fix this with a simple workaround to avoid the 2nd byte column address
> for those two commands.
>
> Also align the code with nand_base to support 16 bit devices.
>
> Tested on an iMX6SX device with:
> * Winbond W29N04GVSIAA
> * Spansion S34ML04G100TF100
> * Samsung K9F4G08U00
>
> Tested on imx8mn device with:
> * Windbond W29N04GV
>
> Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
> CC: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> drivers/mtd/nand/raw/mxs_nand_spl.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
> index 2bfb181007..3daacbb330 100644
> --- a/drivers/mtd/nand/raw/mxs_nand_spl.c
> +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
> @@ -29,8 +29,20 @@ static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
>
> /* Serially input address */
> if (column != -1) {
> + /* Adjust columns for 16 bit buswidth */
> + if (chip->options & NAND_BUSWIDTH_16 &&
> + !nand_opcode_8bits(command))
> + column >>= 1;
> chip->cmd_ctrl(mtd, column, NAND_ALE);
> - chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
> +
> + /*
> + * Assume LP NAND here, so use two bytes column address
> + * but not for CMD_READID and CMD_PARAM, which require
> + * only one byte column address
> + */
> + if (command != NAND_CMD_READID &&
> + command != NAND_CMD_PARAM)
> + chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
> }
> if (page_addr != -1) {
> chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
> --
> 2.25.1
>
It will be nice if you can pick this one too. Fabio can you review it?
Michael
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation
2022-06-29 6:49 ` Michael Nazzareno Trimarchi
@ 2022-06-29 12:28 ` Fabio Estevam
0 siblings, 0 replies; 4+ messages in thread
From: Fabio Estevam @ 2022-06-29 12:28 UTC (permalink / raw)
To: Michael Nazzareno Trimarchi
Cc: u-boot, Ye Li, Han Xu, Tom Rini, Andrea Scian, Stefano Babic
Hi Michael,
On 29/06/2022 03:49, Michael Nazzareno Trimarchi wrote:
> It will be nice if you can pick this one too. Fabio can you review it?
The change looks good to me:
Reviewed-by: Fabio Estevam <festevam@denx.de>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation
2022-06-21 20:05 [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation Michael Trimarchi
2022-06-29 6:49 ` Michael Nazzareno Trimarchi
@ 2022-06-29 13:47 ` Tom Rini
1 sibling, 0 replies; 4+ messages in thread
From: Tom Rini @ 2022-06-29 13:47 UTC (permalink / raw)
To: Michael Trimarchi; +Cc: u-boot, Ye Li, Han Xu, Andrea Scian, Stefano Babic
[-- Attachment #1: Type: text/plain, Size: 1170 bytes --]
On Tue, Jun 21, 2022 at 10:05:10PM +0200, Michael Trimarchi wrote:
> From: Andrea Scian <andrea.scian@dave.eu>
>
> mxs_nand_command() implementation assume that it's working with a
> LP NAND, which is a common case nowadays and thus uses two bytes
> for column address.
>
> However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
> expects only one byte of column address, even for LP NANDs.
> This leads to ONFI detection problem with some NAND manufacturer (like
> Winbond) but not with others (like Samsung and Spansion)
>
> We fix this with a simple workaround to avoid the 2nd byte column address
> for those two commands.
>
> Also align the code with nand_base to support 16 bit devices.
>
> Tested on an iMX6SX device with:
> * Winbond W29N04GVSIAA
> * Spansion S34ML04G100TF100
> * Samsung K9F4G08U00
>
> Tested on imx8mn device with:
> * Windbond W29N04GV
>
> Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
> CC: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> Reviewed-by: Fabio Estevam <festevam@denx.de>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-06-21 20:05 [PATCH] mtd: mxs_nand_spl: fix nand_command protocol violation Michael Trimarchi
2022-06-29 6:49 ` Michael Nazzareno Trimarchi
2022-06-29 12:28 ` Fabio Estevam
2022-06-29 13:47 ` Tom Rini
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