* [PATCH] board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card
@ 2022-04-27 14:13 Pali Rohár
2022-06-23 16:22 ` [PATCH v2] " Pali Rohár
0 siblings, 1 reply; 3+ messages in thread
From: Pali Rohár @ 2022-04-27 14:13 UTC (permalink / raw)
To: Priyanka Jain, Sinan Akman; +Cc: u-boot
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.
Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits 6d1dd76afe85 ("board/freescale: Remove P1021RDB board
support") and d521cece5adb ("board/freescale: Remove P1025RDB board
support").
So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
board/freescale/p1_p2_rdb_pc/law.c | 1 -
board/freescale/p1_p2_rdb_pc/tlb.c | 3 ---
include/configs/p1_p2_rdb_pc.h | 9 ---------
scripts/config_whitelist.txt | 4 ----
4 files changed, 17 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 5f4d713ca569..6bdfb356eede 100644
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -9,7 +9,6 @@
struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
- SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
#ifdef CONFIG_VSC7385_ENET
SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index 5931ec650bd8..13f3a1edf68d 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -65,9 +65,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_1M, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_PMC_BASE, CONFIG_SYS_PMC_BASE_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 10, BOOKE_PAGESZ_64K, 1),
#endif /* not SPL */
#ifdef CONFIG_SYS_NAND_BASE
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 50ce2d9aaed4..9102dd819731 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -247,7 +247,6 @@
* 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable
* (early boot only)
* 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0
- * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2
* 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3
* 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2
* 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable
@@ -359,14 +358,6 @@
BR_PS_8 | BR_V)
#define CONFIG_CPLD_OR_PRELIM (0xfff009f7)
-#define CONFIG_SYS_PMC_BASE 0xff980000
-#define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE
-#define CONFIG_PMC_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
- BR_PS_8 | BR_V)
-#define CONFIG_PMC_OR_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
- OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
- OR_GPCM_EAD)
-
/* Vsc7385 switch */
#ifdef CONFIG_VSC7385_ENET
#define __VSCFW_ADDR "vscfw_addr=ef000000\0"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index a6bc234f51ed..33f6d73d3c58 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -637,8 +637,6 @@ CONFIG_PHY_RESET_DELAY
CONFIG_PL011_CLOCK
CONFIG_PL01x_PORTS
CONFIG_PM
-CONFIG_PMC_BR_PRELIM
-CONFIG_PMC_OR_PRELIM
CONFIG_PME_PLAT_CLK_DIV
CONFIG_PMU
CONFIG_PMW_BASE
@@ -1796,8 +1794,6 @@ CONFIG_SYS_PLL_FDR
CONFIG_SYS_PLL_ODR
CONFIG_SYS_PLL_SETTLING_TIME
CONFIG_SYS_PMAN
-CONFIG_SYS_PMC_BASE
-CONFIG_SYS_PMC_BASE_PHYS
CONFIG_SYS_PME_CLK
CONFIG_SYS_POST_MEMORY
CONFIG_SYS_POST_MEM_REGIONS
--
2.20.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v2] board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card
2022-04-27 14:13 [PATCH] board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card Pali Rohár
@ 2022-06-23 16:22 ` Pali Rohár
2022-06-28 17:44 ` Pali Rohár
0 siblings, 1 reply; 3+ messages in thread
From: Pali Rohár @ 2022-06-23 16:22 UTC (permalink / raw)
To: Priyanka Jain, Peng Fan (OSS); +Cc: u-boot
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.
Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits 6d1dd76afe85 ("board/freescale: Remove P1021RDB board
support") and d521cece5adb ("board/freescale: Remove P1025RDB board
support").
So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
Changes in v2:
* Rebase on top of next branch, commit 9121478ee6f2aee381f8fe49d8997d43527d351a
---
board/freescale/p1_p2_rdb_pc/law.c | 1 -
board/freescale/p1_p2_rdb_pc/tlb.c | 3 ---
include/configs/p1_p2_rdb_pc.h | 9 ---------
scripts/config_whitelist.txt | 4 ----
4 files changed, 17 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 5f4d713ca569..6bdfb356eede 100644
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -9,7 +9,6 @@
struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
- SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
#ifdef CONFIG_VSC7385_ENET
SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
#endif
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index 6ded38ac683e..38843a96cbfb 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -65,9 +65,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 6, BOOKE_PAGESZ_1M, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_PMC_BASE, CONFIG_SYS_PMC_BASE_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 10, BOOKE_PAGESZ_64K, 1),
#endif /* not SPL */
#ifdef CONFIG_SYS_NAND_BASE
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 56a16502dcc7..f95a77b7ed32 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -182,7 +182,6 @@
* 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable
* (early boot only)
* 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0
- * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2
* 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3
* 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2
* 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable
@@ -289,14 +288,6 @@
#endif
/* CPLD config size: 1Mb */
-#define CONFIG_SYS_PMC_BASE 0xff980000
-#define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE
-#define CONFIG_PMC_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
- BR_PS_8 | BR_V)
-#define CONFIG_PMC_OR_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
- OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
- OR_GPCM_EAD)
-
/* Vsc7385 switch */
#ifdef CONFIG_VSC7385_ENET
#define __VSCFW_ADDR "vscfw_addr=ef000000\0"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 726973b26e21..7fed8b612bd7 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -456,8 +456,6 @@ CONFIG_PHY_IRAM_BASE
CONFIG_PL011_CLOCK
CONFIG_PL01x_PORTS
CONFIG_PM
-CONFIG_PMC_BR_PRELIM
-CONFIG_PMC_OR_PRELIM
CONFIG_PME_PLAT_CLK_DIV
CONFIG_POST
CONFIG_POSTBOOTMENU
@@ -1465,8 +1463,6 @@ CONFIG_SYS_PLL_FDR
CONFIG_SYS_PLL_ODR
CONFIG_SYS_PLL_SETTLING_TIME
CONFIG_SYS_PMAN
-CONFIG_SYS_PMC_BASE
-CONFIG_SYS_PMC_BASE_PHYS
CONFIG_SYS_PME_CLK
CONFIG_SYS_POST_MEMORY
CONFIG_SYS_POST_MEM_REGIONS
--
2.20.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card
2022-06-23 16:22 ` [PATCH v2] " Pali Rohár
@ 2022-06-28 17:44 ` Pali Rohár
0 siblings, 0 replies; 3+ messages in thread
From: Pali Rohár @ 2022-06-28 17:44 UTC (permalink / raw)
To: Priyanka Jain, Peng Fan (OSS), Tom Rini; +Cc: u-boot
On Thursday 23 June 2022 18:22:21 Pali Rohár wrote:
> From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
> Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
>
> So address mapping for TDM-PMC card on LBC should not be enabled on any
> other P1/P2 RDB board as there is no device at that TDM-PMC address.
>
> Support for P1021RDB and P1025RDB boards was already removed from mainline
> U-Boot in commits 6d1dd76afe85 ("board/freescale: Remove P1021RDB board
> support") and d521cece5adb ("board/freescale: Remove P1025RDB board
> support").
>
> So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
> remove all macros related to TDM-PMC address mappings.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
> Changes in v2:
> * Rebase on top of next branch, commit 9121478ee6f2aee381f8fe49d8997d43527d351a
> ---
PING?
> board/freescale/p1_p2_rdb_pc/law.c | 1 -
> board/freescale/p1_p2_rdb_pc/tlb.c | 3 ---
> include/configs/p1_p2_rdb_pc.h | 9 ---------
> scripts/config_whitelist.txt | 4 ----
> 4 files changed, 17 deletions(-)
>
> diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
> index 5f4d713ca569..6bdfb356eede 100644
> --- a/board/freescale/p1_p2_rdb_pc/law.c
> +++ b/board/freescale/p1_p2_rdb_pc/law.c
> @@ -9,7 +9,6 @@
>
> struct law_entry law_table[] = {
> SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
> - SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
> #ifdef CONFIG_VSC7385_ENET
> SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
> #endif
> diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
> index 6ded38ac683e..38843a96cbfb 100644
> --- a/board/freescale/p1_p2_rdb_pc/tlb.c
> +++ b/board/freescale/p1_p2_rdb_pc/tlb.c
> @@ -65,9 +65,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
> SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
> MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
> 0, 6, BOOKE_PAGESZ_1M, 1),
> - SET_TLB_ENTRY(1, CONFIG_SYS_PMC_BASE, CONFIG_SYS_PMC_BASE_PHYS,
> - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
> - 0, 10, BOOKE_PAGESZ_64K, 1),
> #endif /* not SPL */
>
> #ifdef CONFIG_SYS_NAND_BASE
> diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
> index 56a16502dcc7..f95a77b7ed32 100644
> --- a/include/configs/p1_p2_rdb_pc.h
> +++ b/include/configs/p1_p2_rdb_pc.h
> @@ -182,7 +182,6 @@
> * 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable
> * (early boot only)
> * 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0
> - * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2
> * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3
> * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2
> * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable
> @@ -289,14 +288,6 @@
> #endif
> /* CPLD config size: 1Mb */
>
> -#define CONFIG_SYS_PMC_BASE 0xff980000
> -#define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE
> -#define CONFIG_PMC_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
> - BR_PS_8 | BR_V)
> -#define CONFIG_PMC_OR_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
> - OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
> - OR_GPCM_EAD)
> -
> /* Vsc7385 switch */
> #ifdef CONFIG_VSC7385_ENET
> #define __VSCFW_ADDR "vscfw_addr=ef000000\0"
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index 726973b26e21..7fed8b612bd7 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -456,8 +456,6 @@ CONFIG_PHY_IRAM_BASE
> CONFIG_PL011_CLOCK
> CONFIG_PL01x_PORTS
> CONFIG_PM
> -CONFIG_PMC_BR_PRELIM
> -CONFIG_PMC_OR_PRELIM
> CONFIG_PME_PLAT_CLK_DIV
> CONFIG_POST
> CONFIG_POSTBOOTMENU
> @@ -1465,8 +1463,6 @@ CONFIG_SYS_PLL_FDR
> CONFIG_SYS_PLL_ODR
> CONFIG_SYS_PLL_SETTLING_TIME
> CONFIG_SYS_PMAN
> -CONFIG_SYS_PMC_BASE
> -CONFIG_SYS_PMC_BASE_PHYS
> CONFIG_SYS_PME_CLK
> CONFIG_SYS_POST_MEMORY
> CONFIG_SYS_POST_MEM_REGIONS
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-06-28 17:45 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2022-04-27 14:13 [PATCH] board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card Pali Rohár
2022-06-23 16:22 ` [PATCH v2] " Pali Rohár
2022-06-28 17:44 ` Pali Rohár
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