[PATCH v2 0/2] board/armltd: add support for corstone1000

[PATCH v2 0/2] board/armltd: add support for corstone1000

[Rui Miguel Silva]

This series add support for arm's corstone1000 platform (see
specific commit changelog for references to documentation),
but first introduce a command (loadm which will integrate with
efi subsystem) used in one of the boot sequence in this
platform.

v1 [0] -> v2:
Tom:
  - device tree status (now on kernel next [1])
  - loadm add documentation, testing, change the default value
  - kconfig extra line
  - dm_eth, dm_serial cleanups in platform code and headers
  - moving bootcommand to defconfig
    

[0]: https://lore.kernel.org/all/20220322104118.573537-1-rui.silva@linaro.org/
[1]: https://lore.kernel.org/all/165089291072.1036016.13574796454085073736.b4-ty@arm.com/

Rui Miguel Silva (2):
  cmd: load: add load command for memory mapped
  arm: add support to corstone1000 platform

 README                                   |   1 +
 arch/arm/Kconfig                         |   8 +-
 arch/arm/dts/Makefile                    |   3 +
 arch/arm/dts/corstone1000-fvp.dts        |  51 +++++++
 arch/arm/dts/corstone1000-mps3.dts       |  32 +++++
 arch/arm/dts/corstone1000.dtsi           | 164 +++++++++++++++++++++++
 board/armltd/corstone1000/Kconfig        |  12 ++
 board/armltd/corstone1000/MAINTAINERS    |   7 +
 board/armltd/corstone1000/Makefile       |   7 +
 board/armltd/corstone1000/corstone1000.c |  91 +++++++++++++
 cmd/Kconfig                              |   5 +
 cmd/bootefi.c                            |  12 ++
 cmd/load.c                               |  48 +++++++
 configs/corstone1000_defconfig           |  48 +++++++
 configs/sandbox64_defconfig              |   1 +
 configs/sandbox_defconfig                |   1 +
 doc/usage/loadm.rst                      |  49 +++++++
 include/configs/corstone1000.h           |  52 +++++++
 include/efi_loader.h                     |   2 +
 include/test/suites.h                    |   1 +
 lib/efi_loader/efi_device_path.c         |   9 ++
 test/cmd/Makefile                        |   1 +
 test/cmd/loadm.c                         |  72 ++++++++++
 test/cmd_ut.c                            |   6 +
 24 files changed, 682 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/corstone1000-fvp.dts
 create mode 100644 arch/arm/dts/corstone1000-mps3.dts
 create mode 100644 arch/arm/dts/corstone1000.dtsi
 create mode 100644 board/armltd/corstone1000/Kconfig
 create mode 100644 board/armltd/corstone1000/MAINTAINERS
 create mode 100644 board/armltd/corstone1000/Makefile
 create mode 100644 board/armltd/corstone1000/corstone1000.c
 create mode 100644 configs/corstone1000_defconfig
 create mode 100644 doc/usage/loadm.rst
 create mode 100644 include/configs/corstone1000.h
 create mode 100644 test/cmd/loadm.c

-- 
2.36.1

[PATCH v2 1/2] cmd: load: add load command for memory mapped

[Rui Miguel Silva]

cp.b is used a lot as a way to load binaries to memory and execute
them, however we may need to integrate this with the efi subsystem to
set it up as a bootdev.

So, introduce a loadm command that will be consistent with the other
loadX commands and will call the efi API's.

ex: loadm $kernel_addr $kernel_addr_r $kernel_size

with this a kernel with CONFIG_EFI_STUB enabled will be loaded and
then subsequently booted with bootefi command.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
 README                           |  1 +
 cmd/Kconfig                      |  5 +++
 cmd/bootefi.c                    | 12 ++++++
 cmd/load.c                       | 48 +++++++++++++++++++++
 configs/sandbox64_defconfig      |  1 +
 configs/sandbox_defconfig        |  1 +
 doc/usage/loadm.rst              | 49 ++++++++++++++++++++++
 include/efi_loader.h             |  2 +
 include/test/suites.h            |  1 +
 lib/efi_loader/efi_device_path.c |  9 ++++
 test/cmd/Makefile                |  1 +
 test/cmd/loadm.c                 | 72 ++++++++++++++++++++++++++++++++
 test/cmd_ut.c                    |  6 +++
 13 files changed, 208 insertions(+)
 create mode 100644 doc/usage/loadm.rst
 create mode 100644 test/cmd/loadm.c

diff --git a/README b/README
index b7ab6e50708d..cd76f95e74c1 100644
--- a/README
+++ b/README
@@ -2578,6 +2578,7 @@ rarpboot- boot image via network using RARP/TFTP protocol
 diskboot- boot from IDE devicebootd   - boot default, i.e., run 'bootcmd'
 loads	- load S-Record file over serial line
 loadb	- load binary file over serial line (kermit mode)
+loadm   - load binary blob from source address to destination address
 md	- memory display
 mm	- memory modify (auto-incrementing)
 nm	- memory modify (constant address)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 69c1814d24af..7f98cb16e2bc 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1153,6 +1153,11 @@ config CMD_LOADB
 	help
 	  Load a binary file over serial line.
 
+config CMD_LOADM
+	bool "loadm"
+	help
+	  Load a binary over memory mapped.
+
 config CMD_LOADS
 	bool "loads"
 	default y
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index d80353fa7189..53b584231f07 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -34,6 +34,18 @@ static struct efi_device_path *bootefi_device_path;
 static void *image_addr;
 static size_t image_size;
 
+/**
+ * efi_get_image_parameters() - return image parameters
+ *
+ * @img_addr:		address of loaded image in memory
+ * @img_size:		size of loaded image
+ */
+void efi_get_image_parameters(void **img_addr, size_t *img_size)
+{
+	*img_addr = image_addr;
+	*img_size = image_size;
+}
+
 /**
  * efi_clear_bootdev() - clear boot device
  */
diff --git a/cmd/load.c b/cmd/load.c
index 7e4a552d90ef..1224a7f85bb3 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -1063,6 +1063,44 @@ static ulong load_serial_ymodem(ulong offset, int mode)
 
 #endif
 
+#if defined(CONFIG_CMD_LOADM)
+static int do_load_memory_bin(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
+{
+	ulong	addr, dest, size;
+	void	*src, *dst;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	addr = simple_strtoul(argv[1], NULL, 16);
+
+	dest = simple_strtoul(argv[2], NULL, 16);
+
+	size = simple_strtoul(argv[3], NULL, 16);
+
+	if (!size) {
+		printf("loadm: can not load zero bytes\n");
+		return 1;
+	}
+
+	src = map_sysmem(addr, size);
+	dst = map_sysmem(dest, size);
+
+	memcpy(dst, src, size);
+
+	unmap_sysmem(src);
+	unmap_sysmem(dst);
+
+	if (IS_ENABLED(CONFIG_CMD_BOOTEFI))
+		efi_set_bootdev("Mem", "", "", map_sysmem(dest, 0), size);
+
+	printf("loaded bin to memory: size: %lu\n", size);
+
+	return 0;
+}
+#endif
+
 /* -------------------------------------------------------------------- */
 
 #if defined(CONFIG_CMD_LOADS)
@@ -1137,3 +1175,13 @@ U_BOOT_CMD(
 );
 
 #endif	/* CONFIG_CMD_LOADB */
+
+#if defined(CONFIG_CMD_LOADM)
+U_BOOT_CMD(
+	loadm, 4, 0,	do_load_memory_bin,
+	"load binary blob from source address to destination address",
+	"[src_addr] [dst_addr] [size]\n"
+	"     - load a binary blob from one memory location to other"
+	" from src_addr to dst_addr by size bytes"
+);
+#endif /* CONFIG_CMD_LOADM */
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index d7f22b39ae51..7ab5698b20cd 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -47,6 +47,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_IDE=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOADM=y
 CONFIG_CMD_OSD=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_READ=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index c509a924e6b3..82df5c2728e0 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -67,6 +67,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_IDE=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOADM=y
 CONFIG_CMD_LSBLK=y
 CONFIG_CMD_MUX=y
 CONFIG_CMD_OSD=y
diff --git a/doc/usage/loadm.rst b/doc/usage/loadm.rst
new file mode 100644
index 000000000000..b6571140437d
--- /dev/null
+++ b/doc/usage/loadm.rst
@@ -0,0 +1,49 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+loadm command
+=============
+
+Synopsis
+--------
+
+::
+
+    loadm <src_addr> <dst_addr> <len>
+
+Description
+-----------
+
+The loadm command is used to copy memory content from source address
+to destination address and, if efi is enabled, will setup a "Mem" efi
+boot device.
+
+The number of transferred bytes must be set by bytes parameter
+
+src_addr
+    start address of the memory location to be loaded
+
+dst_addr
+    destination address of the byte stream to be loaded
+
+len
+    number of bytes to be copied in hexadecimal. Can not be 0 (zero).
+
+Example
+-------
+
+::
+
+    => loadm ${kernel_addr} ${kernel_addr_r} ${kernel_size}
+    loaded bin to memory: size: 12582912
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADM=y.
+
+Return value
+------------
+
+The return value $? is set 0 (true) if the loading is succefull, and
+is set to 1 (false) in case of error.
+
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 733ee03cd77a..e051481a9766 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -589,6 +589,8 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle,
 void efi_save_gd(void);
 /* Call this to relocate the runtime section to an address space */
 void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
+/* Call this to get image parameters */
+void efi_get_image_parameters(void **img_addr, size_t *img_size);
 /* Add a new object to the object list. */
 void efi_add_handle(efi_handle_t obj);
 /* Create handle */
diff --git a/include/test/suites.h b/include/test/suites.h
index ee6858a802a5..ddb8827fdb15 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -39,6 +39,7 @@ int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc,
 int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 50a988c56136..afced03bff56 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -1143,6 +1143,8 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr,
 {
 	struct blk_desc *desc = NULL;
 	struct disk_partition fs_partition;
+	size_t image_size;
+	void *image_addr;
 	int part = 0;
 	char *filename;
 	char *s;
@@ -1158,6 +1160,13 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr,
 	} else if (!strcmp(dev, "Uart")) {
 		if (device)
 			*device = efi_dp_from_uart();
+	} else if (!strcmp(dev, "Mem")) {
+		efi_get_image_parameters(&image_addr, &image_size);
+
+		if (device)
+			*device = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE,
+						  (uintptr_t)image_addr,
+						  image_size);
 	} else {
 		part = blk_get_device_part_str(dev, devnr, &desc, &fs_partition,
 					       1);
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index a59adb1e6d60..4b2d7df0d2ef 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
 endif
 obj-y += mem.o
 obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
+obj-$(CONFIG_CMD_LOADM) += loadm.o
 obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
 obj-$(CONFIG_CMD_PINMUX) += pinmux.o
 obj-$(CONFIG_CMD_PWM) += pwm.o
diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c
new file mode 100644
index 000000000000..41e005ac5923
--- /dev/null
+++ b/test/cmd/loadm.c
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for loadm command
+ *
+ * Copyright 2022 ARM Limited
+ * Copyright 2022 Linaro
+ *
+ * Authors:
+ *   Rui Miguel Silva <rui.silva@linaro.org>
+ */
+
+#include <common.h>
+#include <console.h>
+#include <mapmem.h>
+#include <asm/global_data.h>
+#include <dm/test.h>
+#include <test/suites.h>
+#include <test/test.h>
+#include <test/ut.h>
+
+#define BUF_SIZE 0x100
+
+#define LOADM_TEST(_name, _flags)	UNIT_TEST(_name, _flags, loadm_test)
+
+static int loadm_test_params(struct unit_test_state *uts)
+{
+	ut_assertok(console_record_reset_enable());
+	run_command("loadm", 0);
+	ut_assert_nextline("loadm - load binary blob from source address to destination address");
+
+	ut_assertok(console_record_reset_enable());
+	run_command("loadm 0x12345678", 0);
+	ut_assert_nextline("loadm - load binary blob from source address to destination address");
+
+	ut_assertok(console_record_reset_enable());
+	run_command("loadm 0x12345678 0x12345678", 0);
+	ut_assert_nextline("loadm - load binary blob from source address to destination address");
+
+	ut_assertok(console_record_reset_enable());
+	run_command("loadm 0x12345678 0x12345678 0", 0);
+	ut_assert_nextline("loadm: can not load zero bytes");
+
+	return 0;
+}
+LOADM_TEST(loadm_test_params, UT_TESTF_CONSOLE_REC);
+
+static int loadm_test_load (struct unit_test_state *uts)
+{
+	char *buf;
+
+	buf = map_sysmem(0, BUF_SIZE);
+	memset(buf, '\0', BUF_SIZE);
+	memset(buf, 0xaa, BUF_SIZE / 2);
+
+	ut_assertok(console_record_reset_enable());
+	run_command("loadm 0x0 0x80 0x80", 0);
+	ut_assert_nextline("loaded bin to memory: size: 128");
+
+	unmap_sysmem(buf);
+
+	return 0;
+}
+LOADM_TEST(loadm_test_load, UT_TESTF_CONSOLE_REC);
+
+int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+	struct unit_test *tests = UNIT_TEST_SUITE_START(loadm_test);
+	const int n_ents = UNIT_TEST_SUITE_COUNT(loadm_test);
+
+	return cmd_ut_category("loadm", "loadm_test_", tests, n_ents, argc,
+			       argv);
+}
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index 67a13ee32b8b..d70b72678aed 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -74,6 +74,9 @@ static struct cmd_tbl cmd_ut_sub[] = {
 #ifdef CONFIG_CMD_ADDRMAP
 	U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""),
 #endif
+#ifdef CONFIG_CMD_LOADM
+	U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""),
+#endif
 };
 
 static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -155,6 +158,9 @@ static char ut_help_text[] =
 #endif
 #ifdef CONFIG_CMD_ADDRMAP
 	"ut addrmap - Very basic test of addrmap command\n"
+#endif
+#ifdef CONFIG_CMD_LOADM
+	"ut loadm [test-name]- test of parameters and load memory blob\n"
 #endif
 	;
 #endif /* CONFIG_SYS_LONGHELP */
-- 
2.36.1

Re: [PATCH v2 1/2] cmd: load: add load command for memory mapped

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 664 bytes --]

On Wed, May 11, 2022 at 10:55:40AM +0100, Rui Miguel Silva wrote:

> cp.b is used a lot as a way to load binaries to memory and execute
> them, however we may need to integrate this with the efi subsystem to
> set it up as a bootdev.
> 
> So, introduce a loadm command that will be consistent with the other
> loadX commands and will call the efi API's.
> 
> ex: loadm $kernel_addr $kernel_addr_r $kernel_size
> 
> with this a kernel with CONFIG_EFI_STUB enabled will be loaded and
> then subsequently booted with bootefi command.
> 
> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

Re: [PATCH v2 1/2] cmd: load: add load command for memory mapped

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 699 bytes --]

On Wed, May 11, 2022 at 10:55:40AM +0100, Rui Miguel Silva wrote:

> cp.b is used a lot as a way to load binaries to memory and execute
> them, however we may need to integrate this with the efi subsystem to
> set it up as a bootdev.
> 
> So, introduce a loadm command that will be consistent with the other
> loadX commands and will call the efi API's.
> 
> ex: loadm $kernel_addr $kernel_addr_r $kernel_size
> 
> with this a kernel with CONFIG_EFI_STUB enabled will be loaded and
> then subsequently booted with bootefi command.
> 
> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
> Reviewed-by: Tom Rini <trini@konsulko.com>

Applied to u-boot/next, thanks!

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

Re: [PATCH v2 1/2] cmd: load: add load command for memory mapped

[AKASHI Takahiro]

On Wed, May 11, 2022 at 10:55:40AM +0100, Rui Miguel Silva wrote:
> cp.b is used a lot as a way to load binaries to memory and execute
> them, however we may need to integrate this with the efi subsystem to
> set it up as a bootdev.

I'm not sure what your use case looks like, but even the current
bootefi supports an image from memory without "bootefi_device_path" set
(as you might know).
One of such cases is "bootefi hello". See efi_run_image().

> So, introduce a loadm command that will be consistent with the other
> loadX commands and will call the efi API's.
> 
> ex: loadm $kernel_addr $kernel_addr_r $kernel_size

So calling efi_clear_bootdev() in cp.b is a easier fix?
But it might lead to unexpected result in non-efi usage.

I don't object introducing "loadm" command, but
I'm afraid that it's not quite trivial (to most users) why we need loadm,
instead of cp.

-Takahiro Akashi

> with this a kernel with CONFIG_EFI_STUB enabled will be loaded and
> then subsequently booted with bootefi command.
> 
> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
> ---
>  README                           |  1 +
>  cmd/Kconfig                      |  5 +++
>  cmd/bootefi.c                    | 12 ++++++
>  cmd/load.c                       | 48 +++++++++++++++++++++
>  configs/sandbox64_defconfig      |  1 +
>  configs/sandbox_defconfig        |  1 +
>  doc/usage/loadm.rst              | 49 ++++++++++++++++++++++
>  include/efi_loader.h             |  2 +
>  include/test/suites.h            |  1 +
>  lib/efi_loader/efi_device_path.c |  9 ++++
>  test/cmd/Makefile                |  1 +
>  test/cmd/loadm.c                 | 72 ++++++++++++++++++++++++++++++++
>  test/cmd_ut.c                    |  6 +++
>  13 files changed, 208 insertions(+)
>  create mode 100644 doc/usage/loadm.rst
>  create mode 100644 test/cmd/loadm.c
> 
> diff --git a/README b/README
> index b7ab6e50708d..cd76f95e74c1 100644
> --- a/README
> +++ b/README
> @@ -2578,6 +2578,7 @@ rarpboot- boot image via network using RARP/TFTP protocol
>  diskboot- boot from IDE devicebootd   - boot default, i.e., run 'bootcmd'
>  loads	- load S-Record file over serial line
>  loadb	- load binary file over serial line (kermit mode)
> +loadm   - load binary blob from source address to destination address
>  md	- memory display
>  mm	- memory modify (auto-incrementing)
>  nm	- memory modify (constant address)
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index 69c1814d24af..7f98cb16e2bc 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -1153,6 +1153,11 @@ config CMD_LOADB
>  	help
>  	  Load a binary file over serial line.
>  
> +config CMD_LOADM
> +	bool "loadm"
> +	help
> +	  Load a binary over memory mapped.
> +
>  config CMD_LOADS
>  	bool "loads"
>  	default y
> diff --git a/cmd/bootefi.c b/cmd/bootefi.c
> index d80353fa7189..53b584231f07 100644
> --- a/cmd/bootefi.c
> +++ b/cmd/bootefi.c
> @@ -34,6 +34,18 @@ static struct efi_device_path *bootefi_device_path;
>  static void *image_addr;
>  static size_t image_size;
>  
> +/**
> + * efi_get_image_parameters() - return image parameters
> + *
> + * @img_addr:		address of loaded image in memory
> + * @img_size:		size of loaded image
> + */
> +void efi_get_image_parameters(void **img_addr, size_t *img_size)
> +{
> +	*img_addr = image_addr;
> +	*img_size = image_size;
> +}
> +
>  /**
>   * efi_clear_bootdev() - clear boot device
>   */
> diff --git a/cmd/load.c b/cmd/load.c
> index 7e4a552d90ef..1224a7f85bb3 100644
> --- a/cmd/load.c
> +++ b/cmd/load.c
> @@ -1063,6 +1063,44 @@ static ulong load_serial_ymodem(ulong offset, int mode)
>  
>  #endif
>  
> +#if defined(CONFIG_CMD_LOADM)
> +static int do_load_memory_bin(struct cmd_tbl *cmdtp, int flag, int argc,
> +			      char *const argv[])
> +{
> +	ulong	addr, dest, size;
> +	void	*src, *dst;
> +
> +	if (argc != 4)
> +		return CMD_RET_USAGE;
> +
> +	addr = simple_strtoul(argv[1], NULL, 16);
> +
> +	dest = simple_strtoul(argv[2], NULL, 16);
> +
> +	size = simple_strtoul(argv[3], NULL, 16);
> +
> +	if (!size) {
> +		printf("loadm: can not load zero bytes\n");
> +		return 1;
> +	}
> +
> +	src = map_sysmem(addr, size);
> +	dst = map_sysmem(dest, size);
> +
> +	memcpy(dst, src, size);
> +
> +	unmap_sysmem(src);
> +	unmap_sysmem(dst);
> +
> +	if (IS_ENABLED(CONFIG_CMD_BOOTEFI))
> +		efi_set_bootdev("Mem", "", "", map_sysmem(dest, 0), size);
> +
> +	printf("loaded bin to memory: size: %lu\n", size);
> +
> +	return 0;
> +}
> +#endif
> +
>  /* -------------------------------------------------------------------- */
>  
>  #if defined(CONFIG_CMD_LOADS)
> @@ -1137,3 +1175,13 @@ U_BOOT_CMD(
>  );
>  
>  #endif	/* CONFIG_CMD_LOADB */
> +
> +#if defined(CONFIG_CMD_LOADM)
> +U_BOOT_CMD(
> +	loadm, 4, 0,	do_load_memory_bin,
> +	"load binary blob from source address to destination address",
> +	"[src_addr] [dst_addr] [size]\n"
> +	"     - load a binary blob from one memory location to other"
> +	" from src_addr to dst_addr by size bytes"
> +);
> +#endif /* CONFIG_CMD_LOADM */
> diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
> index d7f22b39ae51..7ab5698b20cd 100644
> --- a/configs/sandbox64_defconfig
> +++ b/configs/sandbox64_defconfig
> @@ -47,6 +47,7 @@ CONFIG_CMD_GPT=y
>  CONFIG_CMD_GPT_RENAME=y
>  CONFIG_CMD_IDE=y
>  CONFIG_CMD_I2C=y
> +CONFIG_CMD_LOADM=y
>  CONFIG_CMD_OSD=y
>  CONFIG_CMD_PCI=y
>  CONFIG_CMD_READ=y
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index c509a924e6b3..82df5c2728e0 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -67,6 +67,7 @@ CONFIG_CMD_GPT=y
>  CONFIG_CMD_GPT_RENAME=y
>  CONFIG_CMD_IDE=y
>  CONFIG_CMD_I2C=y
> +CONFIG_CMD_LOADM=y
>  CONFIG_CMD_LSBLK=y
>  CONFIG_CMD_MUX=y
>  CONFIG_CMD_OSD=y
> diff --git a/doc/usage/loadm.rst b/doc/usage/loadm.rst
> new file mode 100644
> index 000000000000..b6571140437d
> --- /dev/null
> +++ b/doc/usage/loadm.rst
> @@ -0,0 +1,49 @@
> +.. SPDX-License-Identifier: GPL-2.0+:
> +
> +loadm command
> +=============
> +
> +Synopsis
> +--------
> +
> +::
> +
> +    loadm <src_addr> <dst_addr> <len>
> +
> +Description
> +-----------
> +
> +The loadm command is used to copy memory content from source address
> +to destination address and, if efi is enabled, will setup a "Mem" efi
> +boot device.
> +
> +The number of transferred bytes must be set by bytes parameter
> +
> +src_addr
> +    start address of the memory location to be loaded
> +
> +dst_addr
> +    destination address of the byte stream to be loaded
> +
> +len
> +    number of bytes to be copied in hexadecimal. Can not be 0 (zero).
> +
> +Example
> +-------
> +
> +::
> +
> +    => loadm ${kernel_addr} ${kernel_addr_r} ${kernel_size}
> +    loaded bin to memory: size: 12582912
> +
> +Configuration
> +-------------
> +
> +The command is only available if CONFIG_CMD_LOADM=y.
> +
> +Return value
> +------------
> +
> +The return value $? is set 0 (true) if the loading is succefull, and
> +is set to 1 (false) in case of error.
> +
> diff --git a/include/efi_loader.h b/include/efi_loader.h
> index 733ee03cd77a..e051481a9766 100644
> --- a/include/efi_loader.h
> +++ b/include/efi_loader.h
> @@ -589,6 +589,8 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle,
>  void efi_save_gd(void);
>  /* Call this to relocate the runtime section to an address space */
>  void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
> +/* Call this to get image parameters */
> +void efi_get_image_parameters(void **img_addr, size_t *img_size);
>  /* Add a new object to the object list. */
>  void efi_add_handle(efi_handle_t obj);
>  /* Create handle */
> diff --git a/include/test/suites.h b/include/test/suites.h
> index ee6858a802a5..ddb8827fdb15 100644
> --- a/include/test/suites.h
> +++ b/include/test/suites.h
> @@ -39,6 +39,7 @@ int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc,
>  int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
>  int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
>  int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
> +int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
>  int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
>  int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
>  int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
> diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
> index 50a988c56136..afced03bff56 100644
> --- a/lib/efi_loader/efi_device_path.c
> +++ b/lib/efi_loader/efi_device_path.c
> @@ -1143,6 +1143,8 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr,
>  {
>  	struct blk_desc *desc = NULL;
>  	struct disk_partition fs_partition;
> +	size_t image_size;
> +	void *image_addr;
>  	int part = 0;
>  	char *filename;
>  	char *s;
> @@ -1158,6 +1160,13 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr,
>  	} else if (!strcmp(dev, "Uart")) {
>  		if (device)
>  			*device = efi_dp_from_uart();
> +	} else if (!strcmp(dev, "Mem")) {
> +		efi_get_image_parameters(&image_addr, &image_size);
> +
> +		if (device)
> +			*device = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE,
> +						  (uintptr_t)image_addr,
> +						  image_size);
>  	} else {
>  		part = blk_get_device_part_str(dev, devnr, &desc, &fs_partition,
>  					       1);
> diff --git a/test/cmd/Makefile b/test/cmd/Makefile
> index a59adb1e6d60..4b2d7df0d2ef 100644
> --- a/test/cmd/Makefile
> +++ b/test/cmd/Makefile
> @@ -7,6 +7,7 @@ obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
>  endif
>  obj-y += mem.o
>  obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
> +obj-$(CONFIG_CMD_LOADM) += loadm.o
>  obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
>  obj-$(CONFIG_CMD_PINMUX) += pinmux.o
>  obj-$(CONFIG_CMD_PWM) += pwm.o
> diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c
> new file mode 100644
> index 000000000000..41e005ac5923
> --- /dev/null
> +++ b/test/cmd/loadm.c
> @@ -0,0 +1,72 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Test for loadm command
> + *
> + * Copyright 2022 ARM Limited
> + * Copyright 2022 Linaro
> + *
> + * Authors:
> + *   Rui Miguel Silva <rui.silva@linaro.org>
> + */
> +
> +#include <common.h>
> +#include <console.h>
> +#include <mapmem.h>
> +#include <asm/global_data.h>
> +#include <dm/test.h>
> +#include <test/suites.h>
> +#include <test/test.h>
> +#include <test/ut.h>
> +
> +#define BUF_SIZE 0x100
> +
> +#define LOADM_TEST(_name, _flags)	UNIT_TEST(_name, _flags, loadm_test)
> +
> +static int loadm_test_params(struct unit_test_state *uts)
> +{
> +	ut_assertok(console_record_reset_enable());
> +	run_command("loadm", 0);
> +	ut_assert_nextline("loadm - load binary blob from source address to destination address");
> +
> +	ut_assertok(console_record_reset_enable());
> +	run_command("loadm 0x12345678", 0);
> +	ut_assert_nextline("loadm - load binary blob from source address to destination address");
> +
> +	ut_assertok(console_record_reset_enable());
> +	run_command("loadm 0x12345678 0x12345678", 0);
> +	ut_assert_nextline("loadm - load binary blob from source address to destination address");
> +
> +	ut_assertok(console_record_reset_enable());
> +	run_command("loadm 0x12345678 0x12345678 0", 0);
> +	ut_assert_nextline("loadm: can not load zero bytes");
> +
> +	return 0;
> +}
> +LOADM_TEST(loadm_test_params, UT_TESTF_CONSOLE_REC);
> +
> +static int loadm_test_load (struct unit_test_state *uts)
> +{
> +	char *buf;
> +
> +	buf = map_sysmem(0, BUF_SIZE);
> +	memset(buf, '\0', BUF_SIZE);
> +	memset(buf, 0xaa, BUF_SIZE / 2);
> +
> +	ut_assertok(console_record_reset_enable());
> +	run_command("loadm 0x0 0x80 0x80", 0);
> +	ut_assert_nextline("loaded bin to memory: size: 128");
> +
> +	unmap_sysmem(buf);
> +
> +	return 0;
> +}
> +LOADM_TEST(loadm_test_load, UT_TESTF_CONSOLE_REC);
> +
> +int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
> +{
> +	struct unit_test *tests = UNIT_TEST_SUITE_START(loadm_test);
> +	const int n_ents = UNIT_TEST_SUITE_COUNT(loadm_test);
> +
> +	return cmd_ut_category("loadm", "loadm_test_", tests, n_ents, argc,
> +			       argv);
> +}
> diff --git a/test/cmd_ut.c b/test/cmd_ut.c
> index 67a13ee32b8b..d70b72678aed 100644
> --- a/test/cmd_ut.c
> +++ b/test/cmd_ut.c
> @@ -74,6 +74,9 @@ static struct cmd_tbl cmd_ut_sub[] = {
>  #ifdef CONFIG_CMD_ADDRMAP
>  	U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""),
>  #endif
> +#ifdef CONFIG_CMD_LOADM
> +	U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""),
> +#endif
>  };
>  
>  static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc,
> @@ -155,6 +158,9 @@ static char ut_help_text[] =
>  #endif
>  #ifdef CONFIG_CMD_ADDRMAP
>  	"ut addrmap - Very basic test of addrmap command\n"
> +#endif
> +#ifdef CONFIG_CMD_LOADM
> +	"ut loadm [test-name]- test of parameters and load memory blob\n"
>  #endif
>  	;
>  #endif /* CONFIG_SYS_LONGHELP */
> -- 
> 2.36.1
> 

[PATCH v2 2/2] arm: add support to corstone1000 platform

[Rui Miguel Silva]

Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].

This code adds the support for the Cortex-A35 implementation
at host side, it contains also the necessary bits to support
the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
FPGA MPS3 board implementation of this platform. [2]

0: https://developer.arm.com/documentation/102360/0000
1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
2: https://developer.arm.com/documentation/dai0550/c/

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
---
 arch/arm/Kconfig                         |   8 +-
 arch/arm/dts/Makefile                    |   3 +
 arch/arm/dts/corstone1000-fvp.dts        |  51 +++++++
 arch/arm/dts/corstone1000-mps3.dts       |  32 +++++
 arch/arm/dts/corstone1000.dtsi           | 164 +++++++++++++++++++++++
 board/armltd/corstone1000/Kconfig        |  12 ++
 board/armltd/corstone1000/MAINTAINERS    |   7 +
 board/armltd/corstone1000/Makefile       |   7 +
 board/armltd/corstone1000/corstone1000.c |  91 +++++++++++++
 configs/corstone1000_defconfig           |  48 +++++++
 include/configs/corstone1000.h           |  52 +++++++
 11 files changed, 474 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/corstone1000-fvp.dts
 create mode 100644 arch/arm/dts/corstone1000-mps3.dts
 create mode 100644 arch/arm/dts/corstone1000.dtsi
 create mode 100644 board/armltd/corstone1000/Kconfig
 create mode 100644 board/armltd/corstone1000/MAINTAINERS
 create mode 100644 board/armltd/corstone1000/Makefile
 create mode 100644 board/armltd/corstone1000/corstone1000.c
 create mode 100644 configs/corstone1000_defconfig
 create mode 100644 include/configs/corstone1000.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0afec5155b1b..68ed0cd4709d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1341,6 +1341,12 @@ config ARCH_VEXPRESS64
 	select ENV_IS_IN_FLASH if MTD
 	imply DISTRO_DEFAULTS
 
+config TARGET_CORSTONE1000
+	bool "Support Corstone1000 Platform"
+	select ARM64
+	select PL01X_SERIAL
+	select DM
+
 config TARGET_TOTAL_COMPUTE
 	bool "Support Total Compute Platform"
 	select ARM64
@@ -2288,7 +2294,7 @@ source "arch/arm/mach-nexell/Kconfig"
 source "arch/arm/mach-npcm/Kconfig"
 
 source "board/armltd/total_compute/Kconfig"
-
+source "board/armltd/corstone1000/Kconfig"
 source "board/bosch/shc/Kconfig"
 source "board/bosch/guardian/Kconfig"
 source "board/Marvell/octeontx/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f67b..964403ed0a70 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1239,6 +1239,9 @@ dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb
 
 dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb
 
+dtb-$(CONFIG_TARGET_CORSTONE1000) += corstone1000-mps3.dtb \
+				corstone1000-fvp.dtb
+
 include $(srctree)/scripts/Makefile.dts
 
 targets += $(dtb-y)
diff --git a/arch/arm/dts/corstone1000-fvp.dts b/arch/arm/dts/corstone1000-fvp.dts
new file mode 100644
index 000000000000..26b0f1b3cea6
--- /dev/null
+++ b/arch/arm/dts/corstone1000-fvp.dts
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0 or MIT
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited. All rights reserved.
+ *
+ */
+
+/dts-v1/;
+
+#include "corstone1000.dtsi"
+
+/ {
+	model = "ARM Corstone1000 FVP (Fixed Virtual Platform)";
+	compatible = "arm,corstone1000-fvp";
+
+	smsc: ethernet@4010000 {
+		compatible = "smsc,lan91c111";
+		reg = <0x40100000 0x10000>;
+		phy-mode = "mii";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+		reg-io-width = <2>;
+	};
+
+	vmmc_v3_3d: fixed_v3_3d {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc_supply";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
+	sdmmc0: mmc@40300000 {
+		compatible = "arm,pl18x", "arm,primecell";
+		reg = <0x40300000 0x1000>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+		max-frequency = <12000000>;
+		vmmc-supply = <&vmmc_v3_3d>;
+		clocks = <&smbclk>, <&refclk100mhz>;
+		clock-names = "smclk", "apb_pclk";
+	};
+
+	sdmmc1: mmc@50000000 {
+		compatible = "arm,pl18x", "arm,primecell";
+		reg = <0x50000000 0x10000>;
+		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+		max-frequency = <12000000>;
+		vmmc-supply = <&vmmc_v3_3d>;
+		clocks = <&smbclk>, <&refclk100mhz>;
+		clock-names = "smclk", "apb_pclk";
+	};
+};
diff --git a/arch/arm/dts/corstone1000-mps3.dts b/arch/arm/dts/corstone1000-mps3.dts
new file mode 100644
index 000000000000..e3146747c2d9
--- /dev/null
+++ b/arch/arm/dts/corstone1000-mps3.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0 or MIT
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited. All rights reserved.
+ *
+ */
+
+/dts-v1/;
+
+#include "corstone1000.dtsi"
+
+/ {
+	model = "ARM Corstone1000 FPGA MPS3 board";
+	compatible = "arm,corstone1000-mps3";
+
+	smsc: ethernet@4010000 {
+		compatible = "smsc,lan9220", "smsc,lan9115";
+		reg = <0x40100000 0x10000>;
+		phy-mode = "mii";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+		reg-io-width = <2>;
+		smsc,irq-push-pull;
+	};
+
+	usb_host: usb@40200000 {
+		compatible = "nxp,usb-isp1763";
+		reg = <0x40200000 0x100000>;
+		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+		bus-width = <16>;
+		dr_mode = "host";
+	};
+};
diff --git a/arch/arm/dts/corstone1000.dtsi b/arch/arm/dts/corstone1000.dtsi
new file mode 100644
index 000000000000..4e46826f883a
--- /dev/null
+++ b/arch/arm/dts/corstone1000.dtsi
@@ -0,0 +1,164 @@
+// SPDX-License-Identifier: GPL-2.0 or MIT
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited. All rights reserved.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0>;
+			next-level-cache = <&L2_0>;
+		};
+	};
+
+	memory@88200000 {
+		device_type = "memory";
+		reg = <0x88200000 0x77e00000>;
+	};
+
+	gic: interrupt-controller@1c000000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg =	<0x1c010000 0x1000>,
+			<0x1c02f000 0x2000>,
+			<0x1c04f000 0x1000>,
+			<0x1c06f000 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
+			      IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	L2_0: l2-cache0 {
+		compatible = "cache";
+		cache-level = <2>;
+		cache-size = <0x80000>;
+		cache-line-size = <64>;
+		cache-sets = <1024>;
+	};
+
+	refclk100mhz: refclk100mhz {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <100000000>;
+		clock-output-names = "apb_pclk";
+	};
+
+	smbclk: refclk24mhzx2 {
+		/* Reference 24MHz clock x 2 */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <48000000>;
+		clock-output-names = "smclk";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts =	<GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
+				 IRQ_TYPE_LEVEL_LOW)>,
+				<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
+				 IRQ_TYPE_LEVEL_LOW)>,
+				<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) |
+				 IRQ_TYPE_LEVEL_LOW)>,
+				<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) |
+				 IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	uartclk: uartclk {
+		/* UART clock - 50MHz */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <50000000>;
+		clock-output-names = "uartclk";
+	};
+
+	psci {
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
+		method = "smc";
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+		timer@1a220000 {
+			compatible = "arm,armv7-timer-mem";
+			reg = <0x1a220000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clock-frequency = <50000000>;
+			ranges;
+
+			frame@1a230000 {
+				frame-number = <0>;
+				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x1a230000 0x1000>;
+			};
+		};
+
+		uart0: serial@1a510000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x1a510000 0x1000>;
+			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&uartclk>, <&refclk100mhz>;
+			clock-names = "uartclk", "apb_pclk";
+		};
+
+		uart1: serial@1a520000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x1a520000 0x1000>;
+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&uartclk>, <&refclk100mhz>;
+			clock-names = "uartclk", "apb_pclk";
+		};
+
+		mhu_hse1: mailbox@1b820000 {
+			compatible = "arm,mhuv2-tx", "arm,primecell";
+			reg = <0x1b820000 0x1000>;
+			clocks = <&refclk100mhz>;
+			clock-names = "apb_pclk";
+			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+			arm,mhuv2-protocols = <0 0>;
+			secure-status = "okay";     /* secure-world-only */
+			status = "disabled";
+		};
+
+		mhu_seh1: mailbox@1b830000 {
+			compatible = "arm,mhuv2-rx", "arm,primecell";
+			reg = <0x1b830000 0x1000>;
+			clocks = <&refclk100mhz>;
+			clock-names = "apb_pclk";
+			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+			arm,mhuv2-protocols = <0 0>;
+			secure-status = "okay";     /* secure-world-only */
+			status = "disabled";
+		};
+	};
+};
diff --git a/board/armltd/corstone1000/Kconfig b/board/armltd/corstone1000/Kconfig
new file mode 100644
index 000000000000..709674d4cf7d
--- /dev/null
+++ b/board/armltd/corstone1000/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_CORSTONE1000
+
+config SYS_BOARD
+	default "corstone1000"
+
+config SYS_VENDOR
+	default "armltd"
+
+config SYS_CONFIG_NAME
+	default "corstone1000"
+
+endif
diff --git a/board/armltd/corstone1000/MAINTAINERS b/board/armltd/corstone1000/MAINTAINERS
new file mode 100644
index 000000000000..8c905686de76
--- /dev/null
+++ b/board/armltd/corstone1000/MAINTAINERS
@@ -0,0 +1,7 @@
+CORSTONE1000 BOARD
+M:	Rui Miguel Silva <rui.silva@linaro.org>
+M:	Vishnu Banavath <vishnu.banavath@arm.com>
+S:	Maintained
+F:	board/armltd/corstone1000/
+F:	include/configs/corstone1000.h
+F:	configs/corstone1000_defconfig
diff --git a/board/armltd/corstone1000/Makefile b/board/armltd/corstone1000/Makefile
new file mode 100644
index 000000000000..77a82c28929b
--- /dev/null
+++ b/board/armltd/corstone1000/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Arm Limited
+# (C) Copyright 2022 Linaro
+# Rui Miguel Silva <rui.silva@linaro.org>
+
+obj-y	:= corstone1000.o
diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
new file mode 100644
index 000000000000..4f4b96a095c2
--- /dev/null
+++ b/board/armltd/corstone1000/corstone1000.c
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022 ARM Limited
+ * (C) Copyright 2022 Linaro
+ * Rui Miguel Silva <rui.silva@linaro.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <netdev.h>
+#include <dm/platform_data/serial_pl01x.h>
+#include <asm/armv8/mmu.h>
+#include <asm/global_data.h>
+
+static struct mm_region corstone1000_mem_map[] = {
+	{
+		/* CVM */
+		.virt = 0x02000000UL,
+		.phys = 0x02000000UL,
+		.size = 0x02000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			PTE_BLOCK_INNER_SHARE
+	}, {
+		/* QSPI */
+		.virt = 0x08000000UL,
+		.phys = 0x08000000UL,
+		.size = 0x08000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			PTE_BLOCK_INNER_SHARE
+	}, {
+		/* Host Peripherals */
+		.virt = 0x1A000000UL,
+		.phys = 0x1A000000UL,
+		.size = 0x26000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			PTE_BLOCK_NON_SHARE |
+			PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* USB */
+		.virt = 0x40200000UL,
+		.phys = 0x40200000UL,
+		.size = 0x00100000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			PTE_BLOCK_NON_SHARE |
+			PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* ethernet */
+		.virt = 0x40100000UL,
+		.phys = 0x40100000UL,
+		.size = 0x00100000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			PTE_BLOCK_NON_SHARE |
+			PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* OCVM */
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			PTE_BLOCK_INNER_SHARE
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = corstone1000_mem_map;
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+}
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
new file mode 100644
index 000000000000..4f6082770f89
--- /dev/null
+++ b/configs/corstone1000_defconfig
@@ -0,0 +1,48 @@
+CONFIG_ARM=y
+CONFIG_TARGET_CORSTONE1000=y
+CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3"
+CONFIG_IDENT_STRING=" corstone1000 aarch64 "
+CONFIG_SYS_LOAD_ADDR=0x82100000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk"
+CONFIG_BOOTCOMMAND="run retrieve_kernel_load_addr; echo Loading kernel from $kernel_addr to memory ... ; loadm $kernel_addr $kernel_addr_r 0xc00000; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;"
+CONFIG_CONSOLE_RECORD=y
+CONFIG_LOGLEVEL=7
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="corstone1000# "
+# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_LOADM=y
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_RTC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_OF_CONTROL=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_MISC=y
+# CONFIG_MMC is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
+CONFIG_DM_ETH=y
+CONFIG_SMC911X=y
+CONFIG_PHY=y
+CONFIG_RAM=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
new file mode 100644
index 000000000000..6bc0fc976018
--- /dev/null
+++ b/include/configs/corstone1000.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 ARM Limited
+ * (C) Copyright 2022 Linaro
+ * Rui Miguel Silva <rui.silva@linaro.org>
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ *
+ * Configuration for Corstone1000. Parts were derived from other ARM
+ * configurations.
+ */
+
+#ifndef __CORSTONE1000_H
+#define __CORSTONE1000_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x03f00000)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_HZ		1000
+
+#define V2M_BASE		0x80000000
+
+#define CONFIG_PL011_CLOCK	50000000
+
+/* Physical Memory Map */
+#define PHYS_SDRAM_1		(V2M_BASE)
+#define PHYS_SDRAM_1_SIZE	0x80000000
+
+#define CONFIG_ENV_SECT_SIZE	SZ_64K
+
+#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE	512	/* Console I/O Buffer Size */
+#define CONFIG_SYS_MAXARGS	64	/* max command args */
+
+#define CONFIG_EXTRA_ENV_SETTINGS							\
+				"usb_pgood_delay=250\0"					\
+				"boot_bank_flag=0x08002000\0"				\
+				"kernel_addr_bank_0=0x083EE000\0"			\
+				"kernel_addr_bank_1=0x0936E000\0"			\
+				"retrieve_kernel_load_addr="				\
+					"if itest.l *${boot_bank_flag} == 0; then "	\
+					    "setenv kernel_addr $kernel_addr_bank_0;"	\
+					"else "						\
+					    "setenv kernel_addr $kernel_addr_bank_1;"	\
+					"fi;"						\
+					"\0"						\
+				"kernel_addr_r=0x88200000\0"
+
+#endif
-- 
2.36.1

Re: [PATCH v2 2/2] arm: add support to corstone1000 platform

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 830 bytes --]

On Wed, May 11, 2022 at 10:55:41AM +0100, Rui Miguel Silva wrote:

> Corstone1000 is a platform from arm, which includes pre
> verified Corstone SSE710 sub-system that combines Cortex-A and
> Cortex-M processors [0].
> 
> This code adds the support for the Cortex-A35 implementation
> at host side, it contains also the necessary bits to support
> the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
> FPGA MPS3 board implementation of this platform. [2]
> 
> 0: https://developer.arm.com/documentation/102360/0000
> 1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
> 2: https://developer.arm.com/documentation/dai0550/c/
> 
> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

Re: [PATCH v2 2/2] arm: add support to corstone1000 platform

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 865 bytes --]

On Wed, May 11, 2022 at 10:55:41AM +0100, Rui Miguel Silva wrote:

> Corstone1000 is a platform from arm, which includes pre
> verified Corstone SSE710 sub-system that combines Cortex-A and
> Cortex-M processors [0].
> 
> This code adds the support for the Cortex-A35 implementation
> at host side, it contains also the necessary bits to support
> the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
> FPGA MPS3 board implementation of this platform. [2]
> 
> 0: https://developer.arm.com/documentation/102360/0000
> 1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
> 2: https://developer.arm.com/documentation/dai0550/c/
> 
> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
> Reviewed-by: Tom Rini <trini@konsulko.com>

Applied to u-boot/next, thanks!

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

Re: [PATCH v2 0/2] board/armltd: add support for corstone1000

[Rui Miguel Silva]

Hey Tom,
On Wed, May 11, 2022 at 10:55:39AM +0100, Rui Miguel Silva wrote:
> This series add support for arm's corstone1000 platform (see
> specific commit changelog for references to documentation),
> but first introduce a command (loadm which will integrate with
> efi subsystem) used in one of the boot sequence in this
> platform.
> 
> v1 [0] -> v2:
> Tom:
>   - device tree status (now on kernel next [1])
>   - loadm add documentation, testing, change the default value
>   - kconfig extra line
>   - dm_eth, dm_serial cleanups in platform code and headers
>   - moving bootcommand to defconfig
>     

Just notice that this series even though got yours reviewed-by tag
never got applied. Do I need to do something from my side for this to
be merged?

Thanks in advance.
Cheers,
     Rui
> 
> [0]: https://lore.kernel.org/all/20220322104118.573537-1-rui.silva@linaro.org/
> [1]: https://lore.kernel.org/all/165089291072.1036016.13574796454085073736.b4-ty@arm.com/
> 
> Rui Miguel Silva (2):
>   cmd: load: add load command for memory mapped
>   arm: add support to corstone1000 platform
> 
>  README                                   |   1 +
>  arch/arm/Kconfig                         |   8 +-
>  arch/arm/dts/Makefile                    |   3 +
>  arch/arm/dts/corstone1000-fvp.dts        |  51 +++++++
>  arch/arm/dts/corstone1000-mps3.dts       |  32 +++++
>  arch/arm/dts/corstone1000.dtsi           | 164 +++++++++++++++++++++++
>  board/armltd/corstone1000/Kconfig        |  12 ++
>  board/armltd/corstone1000/MAINTAINERS    |   7 +
>  board/armltd/corstone1000/Makefile       |   7 +
>  board/armltd/corstone1000/corstone1000.c |  91 +++++++++++++
>  cmd/Kconfig                              |   5 +
>  cmd/bootefi.c                            |  12 ++
>  cmd/load.c                               |  48 +++++++
>  configs/corstone1000_defconfig           |  48 +++++++
>  configs/sandbox64_defconfig              |   1 +
>  configs/sandbox_defconfig                |   1 +
>  doc/usage/loadm.rst                      |  49 +++++++
>  include/configs/corstone1000.h           |  52 +++++++
>  include/efi_loader.h                     |   2 +
>  include/test/suites.h                    |   1 +
>  lib/efi_loader/efi_device_path.c         |   9 ++
>  test/cmd/Makefile                        |   1 +
>  test/cmd/loadm.c                         |  72 ++++++++++
>  test/cmd_ut.c                            |   6 +
>  24 files changed, 682 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/corstone1000-fvp.dts
>  create mode 100644 arch/arm/dts/corstone1000-mps3.dts
>  create mode 100644 arch/arm/dts/corstone1000.dtsi
>  create mode 100644 board/armltd/corstone1000/Kconfig
>  create mode 100644 board/armltd/corstone1000/MAINTAINERS
>  create mode 100644 board/armltd/corstone1000/Makefile
>  create mode 100644 board/armltd/corstone1000/corstone1000.c
>  create mode 100644 configs/corstone1000_defconfig
>  create mode 100644 doc/usage/loadm.rst
>  create mode 100644 include/configs/corstone1000.h
>  create mode 100644 test/cmd/loadm.c
> 
> -- 
> 2.36.1
> 

Re: [PATCH v2 0/2] board/armltd: add support for corstone1000

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 955 bytes --]

On Mon, Jun 20, 2022 at 04:49:52PM +0100, Rui Miguel Silva wrote:

> Hey Tom,
> On Wed, May 11, 2022 at 10:55:39AM +0100, Rui Miguel Silva wrote:
> > This series add support for arm's corstone1000 platform (see
> > specific commit changelog for references to documentation),
> > but first introduce a command (loadm which will integrate with
> > efi subsystem) used in one of the boot sequence in this
> > platform.
> > 
> > v1 [0] -> v2:
> > Tom:
> >   - device tree status (now on kernel next [1])
> >   - loadm add documentation, testing, change the default value
> >   - kconfig extra line
> >   - dm_eth, dm_serial cleanups in platform code and headers
> >   - moving bootcommand to defconfig
> >     
> 
> Just notice that this series even though got yours reviewed-by tag
> never got applied. Do I need to do something from my side for this to
> be merged?

I'll likely be picking this up for next soon, thanks.

-- 
Tom

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]

Re: [PATCH v2 0/2] board/armltd: add support for corstone1000

[Rui Miguel Silva]

Hi Tom,
On Mon, Jun 20, 2022 at 01:43:28PM -0400, Tom Rini wrote:
> On Mon, Jun 20, 2022 at 04:49:52PM +0100, Rui Miguel Silva wrote:
> 
> > Hey Tom,
> > On Wed, May 11, 2022 at 10:55:39AM +0100, Rui Miguel Silva wrote:
> > > This series add support for arm's corstone1000 platform (see
> > > specific commit changelog for references to documentation),
> > > but first introduce a command (loadm which will integrate with
> > > efi subsystem) used in one of the boot sequence in this
> > > platform.
> > > 
> > > v1 [0] -> v2:
> > > Tom:
> > >   - device tree status (now on kernel next [1])
> > >   - loadm add documentation, testing, change the default value
> > >   - kconfig extra line
> > >   - dm_eth, dm_serial cleanups in platform code and headers
> > >   - moving bootcommand to defconfig
> > >     
> > 
> > Just notice that this series even though got yours reviewed-by tag
> > never got applied. Do I need to do something from my side for this to
> > be merged?
> 
> I'll likely be picking this up for next soon, thanks.

Great, many thanks.

Cheers,
     Rui