From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 599EBC433EF for ; Tue, 28 Jun 2022 00:44:23 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 641C7843C1; Tue, 28 Jun 2022 02:44:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 0297B84409; Tue, 28 Jun 2022 02:44:20 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 9229E84312 for ; Tue, 28 Jun 2022 02:44:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 39B9E1691; Mon, 27 Jun 2022 17:44:17 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C77B83F66F; Mon, 27 Jun 2022 17:44:05 -0700 (PDT) Date: Mon, 27 Jun 2022 20:41:19 +0100 From: Andre Przywara To: Samuel Holland Cc: u-boot@lists.denx.de, Jagan Teki , Lukasz Majewski , Sean Anderson , Bin Meng , Heinrich Schuchardt , Maxime Ripard Subject: Re: [PATCH 6/7] reset: sunxi: Convert driver private data to platform data Message-ID: <20220627204119.024a51b8@slackpad.lan> In-Reply-To: <20220509052937.42283-7-samuel@sholland.org> References: <20220509052937.42283-1-samuel@sholland.org> <20220509052937.42283-7-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Mon, 9 May 2022 00:29:36 -0500 Samuel Holland wrote: > The reason here is the same as the reason for changing the clock driver: > platform data can be provided when binding the driver. Yes, that's right. Confirmed to be almost completely s/priv/plat/. > Signed-off-by: Samuel Holland Reviewed-by: Andre Przywara Cheers, Andre > --- > > drivers/reset/reset-sunxi.c | 36 ++++++++++++++++++------------------ > 1 file changed, 18 insertions(+), 18 deletions(-) > > diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c > index 4d02d02834..b060d7f5ed 100644 > --- a/drivers/reset/reset-sunxi.c > +++ b/drivers/reset/reset-sunxi.c > @@ -17,24 +17,24 @@ > #include > #include > > -struct sunxi_reset_priv { > +struct sunxi_reset_plat { > void *base; > const struct ccu_desc *desc; > }; > > -static const struct ccu_reset *priv_to_reset(struct sunxi_reset_priv *priv, > +static const struct ccu_reset *plat_to_reset(struct sunxi_reset_plat *plat, > unsigned long id) > { > - return &priv->desc->resets[id]; > + return &plat->desc->resets[id]; > } > > static int sunxi_reset_request(struct reset_ctl *reset_ctl) > { > - struct sunxi_reset_priv *priv = dev_get_priv(reset_ctl->dev); > + struct sunxi_reset_plat *plat = dev_get_plat(reset_ctl->dev); > > debug("%s: (RST#%ld)\n", __func__, reset_ctl->id); > > - if (reset_ctl->id >= priv->desc->num_resets) > + if (reset_ctl->id >= plat->desc->num_resets) > return -EINVAL; > > return 0; > @@ -49,8 +49,8 @@ static int sunxi_reset_free(struct reset_ctl *reset_ctl) > > static int sunxi_set_reset(struct reset_ctl *reset_ctl, bool on) > { > - struct sunxi_reset_priv *priv = dev_get_priv(reset_ctl->dev); > - const struct ccu_reset *reset = priv_to_reset(priv, reset_ctl->id); > + struct sunxi_reset_plat *plat = dev_get_plat(reset_ctl->dev); > + const struct ccu_reset *reset = plat_to_reset(plat, reset_ctl->id); > u32 reg; > > if (!(reset->flags & CCU_RST_F_IS_VALID)) { > @@ -61,13 +61,13 @@ static int sunxi_set_reset(struct reset_ctl *reset_ctl, bool on) > debug("%s: (RST#%ld) off#0x%x, BIT(%d)\n", __func__, > reset_ctl->id, reset->off, ilog2(reset->bit)); > > - reg = readl(priv->base + reset->off); > + reg = readl(plat->base + reset->off); > if (on) > reg |= reset->bit; > else > reg &= ~reset->bit; > > - writel(reg, priv->base + reset->off); > + writel(reg, plat->base + reset->off); > > return 0; > } > @@ -89,11 +89,11 @@ struct reset_ops sunxi_reset_ops = { > .rst_deassert = sunxi_reset_deassert, > }; > > -static int sunxi_reset_probe(struct udevice *dev) > +static int sunxi_reset_of_to_plat(struct udevice *dev) > { > - struct sunxi_reset_priv *priv = dev_get_priv(dev); > + struct sunxi_reset_plat *plat = dev_get_plat(dev); > > - priv->base = dev_read_addr_ptr(dev); > + plat->base = dev_read_addr_ptr(dev); > > return 0; > } > @@ -101,7 +101,7 @@ static int sunxi_reset_probe(struct udevice *dev) > int sunxi_reset_bind(struct udevice *dev) > { > struct udevice *rst_dev; > - struct sunxi_reset_priv *priv; > + struct sunxi_reset_plat *plat; > int ret; > > ret = device_bind_driver_to_node(dev, "sunxi_reset", "reset", > @@ -110,9 +110,9 @@ int sunxi_reset_bind(struct udevice *dev) > debug("failed to bind sunxi_reset driver (ret=%d)\n", ret); > return ret; > } > - priv = malloc(sizeof(struct sunxi_reset_priv)); > - priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); > - dev_set_priv(rst_dev, priv); > + plat = malloc(sizeof(struct sunxi_reset_plat)); > + plat->desc = (const struct ccu_desc *)dev_get_driver_data(dev); > + dev_set_plat(rst_dev, plat); > > return 0; > } > @@ -121,6 +121,6 @@ U_BOOT_DRIVER(sunxi_reset) = { > .name = "sunxi_reset", > .id = UCLASS_RESET, > .ops = &sunxi_reset_ops, > - .probe = sunxi_reset_probe, > - .priv_auto = sizeof(struct sunxi_reset_priv), > + .of_to_plat = sunxi_reset_of_to_plat, > + .plat_auto = sizeof(struct sunxi_reset_plat), > };