From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52D1AC433EF for ; Tue, 28 Jun 2022 14:07:05 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D11B2844C5; Tue, 28 Jun 2022 16:07:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="cF27wpH5"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 69545844C2; Tue, 28 Jun 2022 16:07:00 +0200 (CEST) Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D008B844A5 for ; Tue, 28 Jun 2022 16:06:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=heiko.thiery@gmail.com Received: by mail-ej1-x62b.google.com with SMTP id ge10so26014163ejb.7 for ; Tue, 28 Jun 2022 07:06:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jTCTZjXHtx+Uq4FAweOqYgrBDS31jTN/lJ4qF/T7igk=; b=cF27wpH5s5X0vNzCKl/hY0uYPiuslz2niaQt+XyRNGnR3SaLCan0jtiX3BaW/yyVTq yRgDcz7GgvVzB8Ixe94FWELMQyPKkHP1kLsBR7ZM5z+GTWJbOe20NB0RGK5MxPHUi65E pdpsywZLy325NLiEbbsLw5TpZZg3380c/y9ls/YW5Yq5fsxo7g2o7I7KHZtqZBEXvT97 /NAuAttrfCs+gGM5A5BAgD6qJJvLX+3ZrEp5dLTvjE5EZeYPBpu/Ekx6ck5udWwnmTtr GiITkT/DWp+Oo8kX6bHRUsBQ25oKbPGmYet75/l204csFQLRIesp3lN6PvMikH1HkT0O fC9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jTCTZjXHtx+Uq4FAweOqYgrBDS31jTN/lJ4qF/T7igk=; b=CcYH5w/9rHmJ1auHiEF1Zl0DWmvHb8a8WZoeZzhEA1aTLAN/xAUYtyVh08FnxNKBc5 0r/JD7ghTqUxXAg1vHklYh8OFvuh2GPy2jmHZmfPqWxwRdNfcaBG6dXRTRaavngd7+gr AGWl3YTqdf6JhOdeRMJlbvvpbnaBCCnlUmYQ60rAuFxAxgPQ5OsjDVSLepeoaiqtq0E3 OyzXYeK9vXAvPkeR/6TZAYxevUSgKqnzxiCAUiKBASaHlXN8HrjqINVSW9jmkKOU7yXl sC9X6GcpS8Rj3HMkUy2AIFsU1AyueqLkXkfbw09TLLDHqUjlK57NTy+jsihhSSU9UBhq O7WA== X-Gm-Message-State: AJIora/ZclwhOzLJwuOTwxL73c0M20C/ufmup+lI+wcnbNnXUpuO243n Am/l0RrIsvMRsnMGwU3epTAEQDsGCc7R3g== X-Google-Smtp-Source: AGRyM1uBZ64Hfs21kYejicbCgWqIn6/ouc66kvgrp2M30UeDaMv22FNwVyd6fxPEJyzDsCVxccEKVQ== X-Received: by 2002:a17:907:1c8a:b0:6e9:2a0d:d7b7 with SMTP id nb10-20020a1709071c8a00b006e92a0dd7b7mr17381742ejc.572.1656425216196; Tue, 28 Jun 2022 07:06:56 -0700 (PDT) Received: from hthiery.fritz.box ([2a02:810b:5a40:2a43:8e16:45ff:fe22:ad85]) by smtp.gmail.com with ESMTPSA id a9-20020a170906244900b00722e50dab2csm6424252ejb.109.2022.06.28.07.06.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 07:06:55 -0700 (PDT) From: Heiko Thiery To: u-boot@lists.denx.de Cc: Jaehoon Chung , Andre Przywara , Samuel Holland , Simon Glass , Kever Yang , Quentin Schulz , Lukasz Majewski , Stephan Gerhold , Fabio Estevam , Marek Vasut , Heiko Thiery , Frieder Schrempf Subject: [PATCH 1/2] pmic: pca9450: enable system reset on WDOG_B assertion Date: Tue, 28 Jun 2022 16:06:22 +0200 Message-Id: <20220628140621.254550-2-heiko.thiery@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220628140621.254550-1-heiko.thiery@gmail.com> References: <20220628140621.254550-1-heiko.thiery@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean By default the PCA9450 doesn't handle the assertion of the WDOG_B signal, but this is required to guarantee that things like software resets triggered by the watchdog work reliably. This is a port of the same changes in the Linux kernel: f7684f5a048f ("regulator: pca9450: Enable system reset on WDOG_B assertion") 2364a64d0673 ("regulator: pca9450: Make warm reset on WDOG_B assertion") Cc: Frieder Schrempf Signed-off-by: Heiko Thiery --- drivers/power/pmic/Kconfig | 4 ++++ drivers/power/pmic/pca9450.c | 15 +++++++++++++++ include/power/pca9450.h | 7 +++++++ 3 files changed, 26 insertions(+) diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index bb3960020d..d30d6d25c4 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -158,6 +158,8 @@ config SPL_DM_PMIC_MP5416 config DM_PMIC_PCA9450 bool "Enable Driver Model for PMIC PCA9450" + select REGMAP + select SYSCON help This config enables implementation of driver-model pmic uclass features for PMIC PCA9450. The driver implements read/write operations. @@ -165,6 +167,8 @@ config DM_PMIC_PCA9450 config SPL_DM_PMIC_PCA9450 bool "Enable Driver Model for PMIC PCA9450" depends on SPL_DM_PMIC + select SPL_REGMAP + select SPL_SYSCON help This config enables implementation of driver-model pmic uclass features for PMIC PCA9450 in SPL. The driver implements read/write operations. diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index a186edc08d..fecab0496f 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include #include #include @@ -30,6 +32,7 @@ static const struct pmic_child_info pmic_children_info[] = { }; struct pca9450_priv { + struct regmap *regmap; struct gpio_desc *sd_vsel_gpio; }; @@ -86,8 +89,20 @@ static int pca9450_bind(struct udevice *dev) static int pca9450_probe(struct udevice *dev) { struct pca9450_priv *priv = dev_get_priv(dev); + unsigned int reset_ctrl; int ret = 0; + priv->regmap = syscon_node_to_regmap(dev_ofnode(dev)); + + if (dev_read_bool(dev, "nxp,wdog_b-warm-reset")) + reset_ctrl = WDOG_B_CFG_WARM; + else + reset_ctrl = WDOG_B_CFG_COLD_LDO12; + + /* Set reset behavior on assertion of WDOG_B signal */ + ret = regmap_update_bits(priv->regmap, PCA9450_RESET_CTRL, + WDOG_B_CFG_MASK, reset_ctrl); + if (CONFIG_IS_ENABLED(DM_GPIO) && CONFIG_IS_ENABLED(DM_REGULATOR_PCA9450)) { priv->sd_vsel_gpio = devm_gpiod_get_optional(dev, "sd-vsel", GPIOD_IS_OUT | diff --git a/include/power/pca9450.h b/include/power/pca9450.h index fa0405fcb8..bf9be7d6bb 100644 --- a/include/power/pca9450.h +++ b/include/power/pca9450.h @@ -67,4 +67,11 @@ enum { #define PCA9450_LDO34_MASK 0x1f #define PCA9450_LDO5_MASK 0x0f +/* PCA9450_REG_RESET_CTRL bits */ +#define WDOG_B_CFG_MASK 0xC0 +#define WDOG_B_CFG_NONE 0x00 +#define WDOG_B_CFG_WARM 0x40 +#define WDOG_B_CFG_COLD_LDO12 0x80 +#define WDOG_B_CFG_COLD 0xC0 + #endif -- 2.30.2