From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0BA2C43334 for ; Wed, 13 Jul 2022 09:54:45 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D837F8437A; Wed, 13 Jul 2022 11:53:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=fris.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=fris.de header.i=@fris.de header.b="kAc7hLfx"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9AC8D84240; Wed, 13 Jul 2022 11:53:31 +0200 (CEST) Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9B7118423F for ; Wed, 13 Jul 2022 11:53:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=fris.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=frieder@fris.de Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 40504BFABE; Wed, 13 Jul 2022 11:53:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1657705992; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=eijqD+dpdui11fyYkIYQT239HcLf+MH0X6H5SDyui0E=; b=kAc7hLfx0SzEWZKRB08nI62xcd8nn4Rm/FPZXTl9uqGOpu5VLYuR3o9bcOsu7a8yqwSB18 c+XuJ3OZ1+x3tOdeNWcW5XdwfTNTBgz9UcgEK8DRI4ADHCZOB47+9/vmqrAp28Gic7GrD/ nyxv/8Lzzwu1+F1BAzjrbgp/Qvf+7Vn4Rspe+mt7n4/5QcvFnezVsPf8F0JLe0QgJYMaar VcMA9YDOLiVIPM29odIw2CLEXtqHCrC8fMhbajtJcqPIqOcssw+dEbkYsFZR2TRaCxsGAF jPWG3kgZWiD6TIkULdBZI4A8w9WklgZiKSNkYKS3HTus94FgktmZYS5LC63uEw== From: Frieder Schrempf To: Fabio Estevam , Frieder Schrempf , Stefano Babic , u-boot@lists.denx.de Cc: Heiko Thiery , Adam Ford , Fabio Estevam , "NXP i.MX U-Boot Team" Subject: [PATCH 11/14] imx: kontron-sl-mx8mm: Use the VSELECT signal to switch SD card IO voltage Date: Wed, 13 Jul 2022 11:52:22 +0200 Message-Id: <20220713095229.43274-12-frieder@fris.de> In-Reply-To: <20220713095229.43274-1-frieder@fris.de> References: <20220713095229.43274-1-frieder@fris.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Frieder Schrempf It turns out that it is not necessary to declare the VSELECT signal as GPIO and let the PMIC driver set it to a fixed high level. This switches the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5 accordingly. Instead we can do it like other boards already do and simply mux the VSELECT signal of the USDHC interface to the pin. This makes sure that the correct voltage is selected by setting the PMIC's SD_VSEL input to high or low accordingly. Reported-by: Heiko Thiery Signed-off-by: Frieder Schrempf --- arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi | 5 ----- arch/arm/dts/imx8mm-kontron-n801x-s.dts | 3 +++ arch/arm/dts/imx8mm-kontron-n801x-som.dtsi | 2 -- 3 files changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi index 2c62f05cec1..a42881d1a89 100644 --- a/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi @@ -62,11 +62,6 @@ &pinctrl_pmic { u-boot,dm-spl; - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141 - /* Disable Pullup for SD_VSEL */ - MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x41 - >; }; &pinctrl_uart3 { diff --git a/arch/arm/dts/imx8mm-kontron-n801x-s.dts b/arch/arm/dts/imx8mm-kontron-n801x-s.dts index cb8102bb8db..bc46426ad8f 100644 --- a/arch/arm/dts/imx8mm-kontron-n801x-s.dts +++ b/arch/arm/dts/imx8mm-kontron-n801x-s.dts @@ -321,6 +321,7 @@ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; @@ -333,6 +334,7 @@ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; @@ -345,6 +347,7 @@ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; }; diff --git a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi index a981a6b4ac0..2d0661cce89 100644 --- a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi +++ b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi @@ -82,7 +82,6 @@ pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; regulators { reg_vdd_soc: BUCK1 { @@ -225,7 +224,6 @@ pinctrl_pmic: pmicgrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141 - MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141 >; }; -- 2.37.0