From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C634C43334 for ; Fri, 15 Jul 2022 16:21:42 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B2DD180909; Fri, 15 Jul 2022 18:21:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="fy+IOyQy"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 16C9381297; Fri, 15 Jul 2022 18:21:39 +0200 (CEST) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0F332803C7 for ; Fri, 15 Jul 2022 18:21:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=afd@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 26FGLSIi083918; Fri, 15 Jul 2022 11:21:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1657902088; bh=NR4bRFldrY3t5FiW3l+l8v30MsQBmSoYn4kvP7jLUpU=; h=From:To:CC:Subject:Date; b=fy+IOyQyyyhIm8MF6l8HRCNbtCIvJk7uvZkNUgvg2154WtesBY8iz01r2T4Cg8Fjd dlG4KJw3Q5L1RwAYJHIYvREaS4vb0wnij6myBF6cOwF+8nUQ4LKbAdY0Qblko8KnRD dwvVyjFNjGV9OQvJeo4BwawpQFewwQdsGNCWp5Fo= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 26FGLS7s085604 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 15 Jul 2022 11:21:28 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Fri, 15 Jul 2022 11:21:28 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Fri, 15 Jul 2022 11:21:28 -0500 Received: from ula0226330.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 26FGLRg6076561; Fri, 15 Jul 2022 11:21:27 -0500 From: Andrew Davis To: Simon Glass , Tom Rini , CC: Andrew Davis Subject: [PATCH] arm: mach-k3: Remove ROM firewalls on GP devices Date: Fri, 15 Jul 2022 11:21:27 -0500 Message-ID: <20220715162127.945-1-afd@ti.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean This isn't strictly needed as these firewalls should all be disabled on GP, but it also doesn't hurt, so do this unconditionally to remove this use of CONFIG_TI_SECURE_DEVICE. Signed-off-by: Andrew Davis --- arch/arm/mach-k3/am6_init.c | 4 ---- arch/arm/mach-k3/j721e_init.c | 4 ---- 2 files changed, 8 deletions(-) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 7992918adc..ded034140f 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -28,7 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW -#ifdef CONFIG_TI_SECURE_DEVICE struct fwl_data main_cbass_fwls[] = { { "MMCSD1_CFG", 2057, 1 }, { "MMCSD0_CFG", 2058, 1 }, @@ -45,7 +44,6 @@ struct fwl_data main_cbass_fwls[] = { { "MCU_CPSW0", 1220, 1 }, }; #endif -#endif static void ctrl_mmr_unlock(void) { @@ -238,10 +236,8 @@ void board_init_f(ulong dummy) preloader_console_init(); /* Disable ROM configured firewalls right after loading sysfw */ -#ifdef CONFIG_TI_SECURE_DEVICE remove_fwl_configs(main_cbass_fwls, ARRAY_SIZE(main_cbass_fwls)); remove_fwl_configs(mcu_cbass_fwls, ARRAY_SIZE(mcu_cbass_fwls)); -#endif #else /* Prepare console output */ preloader_console_init(); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index e56ca6d0f5..2000e8e29c 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -26,7 +26,6 @@ #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW -#ifdef CONFIG_TI_SECURE_DEVICE struct fwl_data cbass_hc_cfg0_fwls[] = { { "PCIE0_CFG", 2560, 8 }, { "PCIE1_CFG", 2561, 8 }, @@ -64,7 +63,6 @@ struct fwl_data cbass_hc_cfg0_fwls[] = { { "WKUP_CTRL_MMR0", 131, 16 }, }; #endif -#endif static void ctrl_mmr_unlock(void) { @@ -255,7 +253,6 @@ void board_init_f(ulong dummy) preloader_console_init(); /* Disable ROM configured firewalls right after loading sysfw */ -#ifdef CONFIG_TI_SECURE_DEVICE remove_fwl_configs(cbass_hc_cfg0_fwls, ARRAY_SIZE(cbass_hc_cfg0_fwls)); remove_fwl_configs(cbass_hc0_fwls, ARRAY_SIZE(cbass_hc0_fwls)); remove_fwl_configs(cbass_rc_cfg0_fwls, ARRAY_SIZE(cbass_rc_cfg0_fwls)); @@ -263,7 +260,6 @@ void board_init_f(ulong dummy) remove_fwl_configs(infra_cbass0_fwls, ARRAY_SIZE(infra_cbass0_fwls)); remove_fwl_configs(mcu_cbass0_fwls, ARRAY_SIZE(mcu_cbass0_fwls)); remove_fwl_configs(wkup_cbass0_fwls, ARRAY_SIZE(wkup_cbass0_fwls)); -#endif #else /* Prepare console output */ preloader_console_init(); -- 2.36.1