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From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>
Cc: u-boot@lists.denx.de
Subject: [PATCH v2] pci: pci_mvebu: Add support for reset-gpios
Date: Fri,  5 Aug 2022 16:03:41 +0200	[thread overview]
Message-ID: <20220805140341.9562-1-pali@kernel.org> (raw)
In-Reply-To: <20220728130357.24514-1-pali@kernel.org>

Release PERST# signal via GPIO when "reset-gpios" is defined in device tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
---
Changes in v2:
* select DM_GPIO
* use asm/gpio.h
---
 drivers/pci/Kconfig     |  1 +
 drivers/pci/pci_mvebu.c | 14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 436acca898e4..22f4995453ed 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -301,6 +301,7 @@ config PCI_MVEBU
 	depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
 	select MISC
 	select DM_RESET
+	select DM_GPIO
 	help
 	  Say Y here if you want to enable PCIe controller support on
 	  Kirkwood and Armada 370/XP/375/38x SoCs.
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index d80f87e0cfc6..5bd340a421b8 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -22,6 +22,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <asm/gpio.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
@@ -60,6 +61,7 @@ struct mvebu_pcie {
 	struct resource mem;
 	void __iomem *iobase;
 	struct resource io;
+	struct gpio_desc reset_gpio;
 	u32 intregs;
 	u32 port;
 	u32 lane;
@@ -416,6 +418,14 @@ static int mvebu_pcie_probe(struct udevice *dev)
 	struct udevice *ctlr = pci_get_controller(dev);
 	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
 	u32 reg;
+	int ret;
+
+	/* Request for optional PERST# GPIO */
+	ret = gpio_request_by_name(dev, "reset-gpios", 0, &pcie->reset_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		printf("%s: unable to request reset-gpios: %d\n", pcie->name, ret);
+		return ret;
+	}
 
 	/*
 	 * Change Class Code of PCI Bridge device to PCI Bridge (0x600400)
@@ -537,6 +547,10 @@ static int mvebu_pcie_probe(struct udevice *dev)
 	pcie->cfgcache[(PCI_PREF_MEMORY_BASE - 0x10) / 4] =
 		PCI_PREF_RANGE_TYPE_64 | (PCI_PREF_RANGE_TYPE_64 << 16);
 
+	/* Release PERST# via GPIO when it was defined */
+	if (dm_gpio_is_valid(&pcie->reset_gpio))
+		dm_gpio_set_value(&pcie->reset_gpio, 0);
+
 	mvebu_pcie_wait_for_link(pcie);
 
 	return 0;
-- 
2.20.1


  parent reply	other threads:[~2022-08-05 14:03 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-28 13:03 [PATCH] pci: pci_mvebu: Add support for reset-gpios Pali Rohár
2022-07-28 15:05 ` Stefan Roese
2022-07-28 15:10   ` Pali Rohár
2022-07-28 15:13     ` Stefan Roese
2022-07-28 15:30       ` Pali Rohár
2022-07-29  8:09         ` Francesco Dolcini
2022-07-29  8:36           ` Pali Rohár
2022-07-29 14:34         ` Stefan Roese
2022-08-05 11:01 ` Stefan Roese
2022-08-05 11:45   ` Pali Rohár
2022-08-05 11:48     ` Stefan Roese
2022-08-05 14:03       ` Pali Rohár
2022-08-05 14:03 ` Pali Rohár [this message]
2022-08-05 14:15   ` [PATCH v2] " Stefan Roese
2022-08-09 11:36   ` Stefan Roese

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