From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0450C00140 for ; Fri, 5 Aug 2022 14:03:58 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F29788482D; Fri, 5 Aug 2022 16:03:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="qXGRNX/L"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BA89784819; Fri, 5 Aug 2022 16:03:55 +0200 (CEST) Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 785EE8483B for ; Fri, 5 Aug 2022 16:03:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 28B20CE2A3A; Fri, 5 Aug 2022 14:03:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6EA22C433D7; Fri, 5 Aug 2022 14:03:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1659708227; bh=p4aA8jeu8g2W7rgpM5KqRQ/+AC6MqvjgbZD5FubuxBE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qXGRNX/L9wnOYTThtZhH+JfJFJ8iDSNuNsF2e34RKZrPw8cRjapdeEYCZ8ar+j0Q0 HD5HSQVtWg/WWhMUzxZLxfnMcWt545FeIXwFEPi8O4YqOJubqcC20ZheQ4ntECxJXD u5OBcVKd0qphVuFGMCuQs/4WJezW9sCLDuJts5vnNfm3Hug7SraaF4VoELzPXetI3b hA5vgCKds35n3yyitQXlCcTmwg0gh+vYw39u6LOlVM3oNg+O9zzxCmWTynyaeipefX nJg5cKRWhwZwZ+c4WLuooMJXY+GWv6tLXnuhhIPaBzFVuWVckSau8qTbL37hUfrrcb M462rMdwZZO8A== Received: by pali.im (Postfix) id 0854482D; Fri, 5 Aug 2022 16:03:45 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese Cc: u-boot@lists.denx.de Subject: [PATCH v2] pci: pci_mvebu: Add support for reset-gpios Date: Fri, 5 Aug 2022 16:03:41 +0200 Message-Id: <20220805140341.9562-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220728130357.24514-1-pali@kernel.org> References: <20220728130357.24514-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Release PERST# signal via GPIO when "reset-gpios" is defined in device tree. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- Changes in v2: * select DM_GPIO * use asm/gpio.h --- drivers/pci/Kconfig | 1 + drivers/pci/pci_mvebu.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 436acca898e4..22f4995453ed 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -301,6 +301,7 @@ config PCI_MVEBU depends on (ARCH_KIRKWOOD || ARCH_MVEBU) select MISC select DM_RESET + select DM_GPIO help Say Y here if you want to enable PCIe controller support on Kirkwood and Armada 370/XP/375/38x SoCs. diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index d80f87e0cfc6..5bd340a421b8 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -60,6 +61,7 @@ struct mvebu_pcie { struct resource mem; void __iomem *iobase; struct resource io; + struct gpio_desc reset_gpio; u32 intregs; u32 port; u32 lane; @@ -416,6 +418,14 @@ static int mvebu_pcie_probe(struct udevice *dev) struct udevice *ctlr = pci_get_controller(dev); struct pci_controller *hose = dev_get_uclass_priv(ctlr); u32 reg; + int ret; + + /* Request for optional PERST# GPIO */ + ret = gpio_request_by_name(dev, "reset-gpios", 0, &pcie->reset_gpio, GPIOD_IS_OUT); + if (ret && ret != -ENOENT) { + printf("%s: unable to request reset-gpios: %d\n", pcie->name, ret); + return ret; + } /* * Change Class Code of PCI Bridge device to PCI Bridge (0x600400) @@ -537,6 +547,10 @@ static int mvebu_pcie_probe(struct udevice *dev) pcie->cfgcache[(PCI_PREF_MEMORY_BASE - 0x10) / 4] = PCI_PREF_RANGE_TYPE_64 | (PCI_PREF_RANGE_TYPE_64 << 16); + /* Release PERST# via GPIO when it was defined */ + if (dm_gpio_is_valid(&pcie->reset_gpio)) + dm_gpio_set_value(&pcie->reset_gpio, 0); + mvebu_pcie_wait_for_link(pcie); return 0; -- 2.20.1