[PATCH v3 1/3] mmc: fsl_esdhc_spl: Add support for loading proper U-Boot from unaligned location

["Pali Rohár" <pali@kernel.org>]

This allows to concatenate SPL and proper U-Boot without extra alignment.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
---
Changes in v3:
* Fix compilation with CONFIG_FSL_CORENET

Changes in v2:
* Rebased on top of the U-Boot next branch, commit 98c4828740f4944462b7d9608b95d5b73850c7b0
---
 drivers/mmc/fsl_esdhc_spl.c | 35 ++++++++++++++++++++++++++---------
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c
index 760f13d24018..dd6d5fa81ea6 100644
--- a/drivers/mmc/fsl_esdhc_spl.c
+++ b/drivers/mmc/fsl_esdhc_spl.c
@@ -58,10 +58,10 @@ void __noreturn mmc_boot(void)
 {
 	__attribute__((noreturn)) void (*uboot)(void);
 	uint blk_start, blk_cnt, err;
-#ifndef CONFIG_FSL_CORENET
 	uchar *tmp_buf;
 	u32 blklen;
 	u32 blk_off;
+#ifndef CONFIG_FSL_CORENET
 	uchar val;
 #ifndef CONFIG_SPL_FSL_PBL
 	u32 val32;
@@ -83,9 +83,6 @@ void __noreturn mmc_boot(void)
 		hang();
 	}
 
-#ifdef CONFIG_FSL_CORENET
-	offset = CONFIG_SYS_MMC_U_BOOT_OFFS;
-#else
 	blklen = mmc->read_bl_len;
 	if (blklen < 512)
 		blklen = 512;
@@ -95,6 +92,9 @@ void __noreturn mmc_boot(void)
 		hang();
 	}
 
+#ifdef CONFIG_FSL_CORENET
+	offset = CONFIG_SYS_MMC_U_BOOT_OFFS;
+#else
 	sector = 0;
 again:
 	memset(tmp_buf, 0, blklen);
@@ -155,17 +155,34 @@ again:
 	* Load U-Boot image from mmc into RAM
 	*/
 	code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
-	blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
-	blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
+	blk_start = offset / mmc->read_bl_len;
+	blk_off = offset % mmc->read_bl_len;
+	blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
+	if (blk_off) {
+		err = mmc->block_dev.block_read(&mmc->block_dev,
+						blk_start, 1, tmp_buf);
+		if (err != 1) {
+			puts("spl: mmc read failed!!\n");
+			hang();
+		}
+		blk_start++;
+	}
 	err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
-					(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
+					(uchar *)CONFIG_SYS_MMC_U_BOOT_DST +
+					(blk_off ? (mmc->read_bl_len - blk_off) : 0));
 	if (err != blk_cnt) {
 		puts("spl: mmc read failed!!\n");
-#ifndef CONFIG_FSL_CORENET
 		free(tmp_buf);
-#endif
 		hang();
 	}
+	/*
+	 * SDHC DMA may erase bytes at dst + bl_len - blk_off - 8
+	 * due to unaligned access. So copy leading bytes from tmp_buf
+	 * after SDHC DMA transfer.
+	 */
+	if (blk_off)
+		memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,
+		       tmp_buf + blk_off, mmc->read_bl_len - blk_off);
 
 	/*
 	* Clean d-cache and invalidate i-cache, to
-- 
2.20.1