From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED433ECAAA1 for ; Tue, 30 Aug 2022 18:10:17 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2FE78849B9; Tue, 30 Aug 2022 20:10:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DhoOKaOM"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9955584993; Tue, 30 Aug 2022 20:08:56 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0CF56845CE for ; Tue, 30 Aug 2022 20:08:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661882934; x=1693418934; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=luagC6aQk2k2Idj64Xygsw7Fxr6ARMt+FXYheiPB8nY=; b=DhoOKaOMy3XSyJ6HSBjIxlk3ndSy7Zarj4dW4ohLN3KB8M7OdPNFDlVi /pl0dtwp6jg3Fq0ksMvaDac7iilbc3XTMyKthr937rQEG084ynhSORLEk b+SuBPTYnF+Fi46Ezu/452dWnIQJmziRtI/4hU9fmC6FwBJX6U8CHtrlQ gwZn9zMzkn8NwRwm0yEc49VNAernj532hEe8n/bPFe7qbm6P6AYQs7hwq TFLlk4/s4XXGmJlXPWw1bjC29k7IW2TXdrZH37QE4vHvRXhQY6IeAY541 +pptXDhF25J1vo9ftslYmBl0xyYYW3gRQ64IZ0DfAHXMPI3b/a69Zpwhh g==; X-IronPort-AV: E=McAfee;i="6500,9779,10455"; a="294005978" X-IronPort-AV: E=Sophos;i="5.93,275,1654585200"; d="scan'208";a="294005978" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Aug 2022 11:08:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,275,1654585200"; d="scan'208";a="715410797" Received: from pglmail07.png.intel.com ([10.221.193.207]) by fmsmga002.fm.intel.com with ESMTP; 30 Aug 2022 11:08:13 -0700 Received: from localhost (pgli0078.png.intel.com [10.221.240.41]) by pglmail07.png.intel.com (Postfix) with ESMTP id 16E152B03; Wed, 31 Aug 2022 02:08:13 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id E9DC6299C; Tue, 30 Aug 2022 23:42:53 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Sieu Mun Tang , Jit Loon Lim , Chin Liang See Subject: [PATCH] arch: arm: mach-socfpga: To notify SDM when SPL pass control to U-Boot Date: Tue, 30 Aug 2022 23:42:46 +0800 Message-Id: <20220830154246.9793-1-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Tue, 30 Aug 2022 20:09:54 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Chin Liang See Prior SPL pass control to U-Boot, SPL will send a mailbox command "HPS_STAGE_NOTIFY" to notify Secure Device Manager (SDM) on HPS SW transition. The purpose is for debug as user can query SDM on HPS error details when HPS enters a warm reset due to error such as watchdog. Signed-off-by: Chin Liang See Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/spl_s10.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index c20e87cdbe..9bfd1a0f6a 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -92,3 +92,9 @@ void board_init_f(ulong dummy) mbox_qspi_open(); #endif } + +/* board specific function prior loading SSBL / U-Boot */ +void spl_board_prepare_for_boot(void) +{ + mbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); +} -- 2.19.0