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From: Jit Loon Lim <jit.loon.lim@intel.com>
To: u-boot@lists.denx.de
Cc: Jagan Teki <jagan@amarulasolutions.com>,
	Vignesh R <vigneshr@ti.com>, Marek <marex@denx.de>,
	Simon <simon.k.r.goldschmidt@gmail.com>,
	Tien Fong <tien.fong.chee@intel.com>,
	Kok Kiang <kok.kiang.hea@intel.com>,
	Siew Chin <elly.siew.chin.lim@intel.com>,
	Sin Hui <sin.hui.kho@intel.com>, Raaj <raaj.lokanathan@intel.com>,
	Dinesh <dinesh.maniyam@intel.com>,
	Boon Khai <boon.khai.ng@intel.com>,
	Alif <alif.zakuan.yuslaimi@intel.com>,
	Teik Heng <teik.heng.chong@intel.com>,
	Hazim <muhammad.hazim.izzat.zamri@intel.com>,
	Sieu Mun Tang <sieu.mun.tang@intel.com>,
	Jit Loon Lim <jit.loon.lim@intel.com>,
	Chee Hong Ang <chee.hong.ang@intel.com>
Subject: [PATCH 1/3] arch: arm: mach-socfpga: Add a backup copy of .data section for SoC64 SPL
Date: Wed, 31 Aug 2022 23:18:50 +0800	[thread overview]
Message-ID: <20220831151852.7494-2-jit.loon.lim@intel.com> (raw)
In-Reply-To: <20220831151852.7494-1-jit.loon.lim@intel.com>

From: Chee Hong Ang <chee.hong.ang@intel.com>

Add a new .data section for preserving the original state of the
.data section of SoC64 SPL. This new .data section is required to
make SPL reentrant after warm reset.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
 arch/arm/mach-socfpga/u-boot-spl-soc64.lds | 93 ++++++++++++++++++++++
 1 file changed, 93 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/u-boot-spl-soc64.lds

diff --git a/arch/arm/mach-socfpga/u-boot-spl-soc64.lds b/arch/arm/mach-socfpga/u-boot-spl-soc64.lds
new file mode 100644
index 0000000000..05c441c088
--- /dev/null
+++ b/arch/arm/mach-socfpga/u-boot-spl-soc64.lds
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2018
+ * Intel Corporation <www.intel.com>
+ *
+ * (C) Copyright 2013
+ * David Feng <fenghua@phytium.com.cn>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *	Aneesh V <aneesh@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+	.text : {
+		. = ALIGN(8);
+		*(.__image_copy_start)
+		CPUDIR/start.o (.text*)
+		*(.text*)
+	} >.sram
+
+	.rodata : {
+		. = ALIGN(8);
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	} >.sram
+
+	.data : {
+		. = ALIGN(8);
+		/* Run time .data section starting at this location */
+		__data_start = .;
+		*(.data*)
+		/* Run time .data section ending at this location */
+		__data_end = .;
+	} >.sram
+
+	. = ALIGN(8);
+	/* Preserve original .data section starting at this location */
+	__preserve_data_start = .;
+	. = __preserve_data_start + (__data_end - __data_start);
+	/* Preserve original .data section ending at this location */
+	__preserve_data_end = .;
+
+	. = ALIGN(8);
+	.u_boot_list . : {
+		KEEP(*(SORT(.u_boot_list*)));
+	} >.sram
+
+	.image_copy_end : {
+		. = ALIGN(8);
+		*(.__image_copy_end)
+	} >.sram
+
+	.end : {
+		. = ALIGN(8);
+		*(.__end)
+	} >.sram
+
+	_image_binary_end = .;
+
+	.bss_start (NOLOAD) : {
+		. = ALIGN(8);
+		KEEP(*(.__bss_start));
+	} >.sdram
+
+	.bss (NOLOAD) : {
+		*(.bss*)
+		 . = ALIGN(8);
+	} >.sdram
+
+	.bss_end (NOLOAD) : {
+		KEEP(*(.__bss_end));
+	} >.sdram
+
+	/DISCARD/ : { *(.dynsym) }
+	/DISCARD/ : { *(.dynstr*) }
+	/DISCARD/ : { *(.dynamic*) }
+	/DISCARD/ : { *(.plt*) }
+	/DISCARD/ : { *(.interp*) }
+	/DISCARD/ : { *(.gnu*) }
+}
-- 
2.26.2


  reply	other threads:[~2022-08-31 15:19 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-31 15:18 [PATCH 0/3] *** SUBJECT HERE *** Jit Loon Lim
2022-08-31 15:18 ` Jit Loon Lim [this message]
2022-08-31 15:18 ` [PATCH 2/3] configs: socfpga: Specify new linker script specific to SoC64 SPL Jit Loon Lim
2022-08-31 15:18 ` [PATCH 3/3] arch: arm: mach-socfpga: Reload SoC64 SPL state after warm reset Jit Loon Lim

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