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From: Jit Loon Lim <jit.loon.lim@intel.com>
To: u-boot@lists.denx.de
Cc: Jagan Teki <jagan@amarulasolutions.com>,
	Vignesh R <vigneshr@ti.com>, Marek <marex@denx.de>,
	Simon <simon.k.r.goldschmidt@gmail.com>,
	Tien Fong <tien.fong.chee@intel.com>,
	Kok Kiang <kok.kiang.hea@intel.com>,
	Siew Chin <elly.siew.chin.lim@intel.com>,
	Sin Hui <sin.hui.kho@intel.com>, Raaj <raaj.lokanathan@intel.com>,
	Dinesh <dinesh.maniyam@intel.com>,
	Boon Khai <boon.khai.ng@intel.com>,
	Alif <alif.zakuan.yuslaimi@intel.com>,
	Teik Heng <teik.heng.chong@intel.com>,
	Hazim <muhammad.hazim.izzat.zamri@intel.com>,
	Sieu Mun Tang <sieu.mun.tang@intel.com>,
	Jit Loon Lim <jit.loon.lim@intel.com>,
	Chee Hong Ang <chee.hong.ang@intel.com>
Subject: [PATCH 3/3] arch: arm: mach-socfpga: Reload SoC64 SPL state after warm reset
Date: Wed, 31 Aug 2022 23:18:52 +0800	[thread overview]
Message-ID: <20220831151852.7494-4-jit.loon.lim@intel.com> (raw)
In-Reply-To: <20220831151852.7494-1-jit.loon.lim@intel.com>

From: Chee Hong Ang <chee.hong.ang@intel.com>

When the system boot from cold reset, SPL will copy its .data section
into this backup section to keep an original copy of .data section.
When the system has been warm reset, SPL will reload the original .data
section from this backup section to restore the original state of SPL.
This is required to make sure SPL still run in fresh state after
warm reset.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
 arch/arm/mach-socfpga/lowlevel_init_soc64.S | 37 +++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/mach-socfpga/lowlevel_init_soc64.S b/arch/arm/mach-socfpga/lowlevel_init_soc64.S
index 875927cc4d..07adf62ea8 100644
--- a/arch/arm/mach-socfpga/lowlevel_init_soc64.S
+++ b/arch/arm/mach-socfpga/lowlevel_init_soc64.S
@@ -71,6 +71,43 @@ lowlevel_in_el1:
 #endif /* CONFIG_ARMV8_MULTIENTRY */
 
 2:
+
+#ifdef CONFIG_SPL_BUILD
+	branch_if_slave x0, 3f
+
+	/* Check rstmgr.stat for warm reset status */
+	ldr	x1, =SOCFPGA_RSTMGR_ADDRESS
+	ldr	x0, [x1]
+	/* Check whether any L4 watchdogs or MPUs had triggered warm reset */
+	ldr	x2, =0x000F0F00
+	ands	x0, x0, x2
+	/*
+	 * If current Reset Manager's status is warm reset just reload the
+	 * .data section by copying the data from data preserve section.
+	 * Otherwise, copy the .data section to the data preserve section to
+	 * keep an original copy of .data section. This ensure SPL is
+	 * reentrant after warm reset.
+	 */
+	b.ne	reload_data_section
+	/* Copy from .data to preserved .data to backup the SPL state */
+	ldr	x0, =__data_start
+	ldr	x1, =__preserve_data_start
+	ldr	x2, =__preserve_data_end
+	b	copy_loop
+reload_data_section:
+	/* Copy from preserved .data to .data to restore the SPL state */
+	ldr	x0, =__preserve_data_start
+	ldr	x1, =__data_start
+	ldr	x2, =__data_end
+copy_loop:
+	ldr	w3, [x0]
+	add	x0, x0, #4
+	str	w3, [x1]
+	add	x1, x1, #4
+	cmp	x1, x2
+	b.ne	copy_loop
+3:
+#endif
 	mov	lr, x29			/* Restore LR */
 	ret
 ENDPROC(lowlevel_init)
-- 
2.26.2


      parent reply	other threads:[~2022-08-31 15:19 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-31 15:18 [PATCH 0/3] *** SUBJECT HERE *** Jit Loon Lim
2022-08-31 15:18 ` [PATCH 1/3] arch: arm: mach-socfpga: Add a backup copy of .data section for SoC64 SPL Jit Loon Lim
2022-08-31 15:18 ` [PATCH 2/3] configs: socfpga: Specify new linker script specific to " Jit Loon Lim
2022-08-31 15:18 ` Jit Loon Lim [this message]

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