From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7CEB8ECAAD4 for ; Wed, 31 Aug 2022 15:19:31 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5B088849B4; Wed, 31 Aug 2022 17:19:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="bxUpoJcC"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4D39F849B4; Wed, 31 Aug 2022 17:19:09 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F376F849B7 for ; Wed, 31 Aug 2022 17:19:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jitloonl@ecsmtp.png.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661959141; x=1693495141; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fF2INDhnkU3dWGP9OywJXZHdRZkLwBFrvNotfEMtXVE=; b=bxUpoJcCdMpBgrfiYcmx4mstx8NtWzYNTZn8reaz31yQBJfvuQUo7qcC QbpVwQVF5rga1rrvpplSGHq0oftAxcrMBxicZ11PnqtruMxYKQeWxLPt3 0a1tWcc6szxeXlSGgsqkMghdfy73h6MS+rV+7wfVEY2vY8l7uNjxLRhMJ ekQS8AF9mHkaHtfYXKF45VeEbaCSS+uebxx0LMvdiq6zD+HRExKxFfucB oKoP3h1L5eP0G+bwUnO8t8wS53nf0RoP7qmr1bDbCBTrdTozESof8feuS zWkOguQtQ4AwzYMygmEvl7ZS8emLhUfg4M5q75dLpFkohTjEvBSoifBeh Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10456"; a="359428678" X-IronPort-AV: E=Sophos;i="5.93,278,1654585200"; d="scan'208";a="359428678" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Aug 2022 08:18:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,278,1654585200"; d="scan'208";a="589066489" Received: from pglmail07.png.intel.com ([10.221.193.207]) by orsmga006.jf.intel.com with ESMTP; 31 Aug 2022 08:18:55 -0700 Received: from localhost (pgli0117.png.intel.com [10.221.240.80]) by pglmail07.png.intel.com (Postfix) with ESMTP id E484B32E7; Wed, 31 Aug 2022 23:18:54 +0800 (+08) Received: by localhost (Postfix, from userid 12048045) id E37953D21; Wed, 31 Aug 2022 23:18:54 +0800 (+08) From: Jit Loon Lim To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Sieu Mun Tang , Jit Loon Lim , Chee Hong Ang Subject: [PATCH 3/3] arch: arm: mach-socfpga: Reload SoC64 SPL state after warm reset Date: Wed, 31 Aug 2022 23:18:52 +0800 Message-Id: <20220831151852.7494-4-jit.loon.lim@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220831151852.7494-1-jit.loon.lim@intel.com> References: <20220831151852.7494-1-jit.loon.lim@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Chee Hong Ang When the system boot from cold reset, SPL will copy its .data section into this backup section to keep an original copy of .data section. When the system has been warm reset, SPL will reload the original .data section from this backup section to restore the original state of SPL. This is required to make sure SPL still run in fresh state after warm reset. Signed-off-by: Chee Hong Ang Signed-off-by: Jit Loon Lim --- arch/arm/mach-socfpga/lowlevel_init_soc64.S | 37 +++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/mach-socfpga/lowlevel_init_soc64.S b/arch/arm/mach-socfpga/lowlevel_init_soc64.S index 875927cc4d..07adf62ea8 100644 --- a/arch/arm/mach-socfpga/lowlevel_init_soc64.S +++ b/arch/arm/mach-socfpga/lowlevel_init_soc64.S @@ -71,6 +71,43 @@ lowlevel_in_el1: #endif /* CONFIG_ARMV8_MULTIENTRY */ 2: + +#ifdef CONFIG_SPL_BUILD + branch_if_slave x0, 3f + + /* Check rstmgr.stat for warm reset status */ + ldr x1, =SOCFPGA_RSTMGR_ADDRESS + ldr x0, [x1] + /* Check whether any L4 watchdogs or MPUs had triggered warm reset */ + ldr x2, =0x000F0F00 + ands x0, x0, x2 + /* + * If current Reset Manager's status is warm reset just reload the + * .data section by copying the data from data preserve section. + * Otherwise, copy the .data section to the data preserve section to + * keep an original copy of .data section. This ensure SPL is + * reentrant after warm reset. + */ + b.ne reload_data_section + /* Copy from .data to preserved .data to backup the SPL state */ + ldr x0, =__data_start + ldr x1, =__preserve_data_start + ldr x2, =__preserve_data_end + b copy_loop +reload_data_section: + /* Copy from preserved .data to .data to restore the SPL state */ + ldr x0, =__preserve_data_start + ldr x1, =__data_start + ldr x2, =__data_end +copy_loop: + ldr w3, [x0] + add x0, x0, #4 + str w3, [x1] + add x1, x1, #4 + cmp x1, x2 + b.ne copy_loop +3: +#endif mov lr, x29 /* Restore LR */ ret ENDPROC(lowlevel_init) -- 2.26.2